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PDF NTHS4501N Data sheet ( Hoja de datos )

Número de pieza NTHS4501N
Descripción Power MOSFET ( Transistor )
Fabricantes ON Semiconductor 
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No Preview Available ! NTHS4501N Hoja de datos, Descripción, Manual

NTHS4501N
Power MOSFET
30 V, 6.7 A, Single N−Channel,
ChipFETt Package
Features
Planar Technology Device Offers Low RDS(on) and Fast Switching Speed
in a ChipFET Package
Leadless ChipFET Package has 40% Smaller Footprint than TSOP−6.
Ideal Device for Applications Where Board Space is at a Premium.
ChipFET Package Exhibits Excellent Thermal Capabilities Where
Heat Transfer is Required.
Pb−Free Package is Available
Applications
Buck and Boost Converters
Optimized for Battery and Load Management Applications in
Portable Equipment such as Notebook Computers, MP3 Players,
Cell Phones, Digital Cameras, Personal Digital Assistants and Other
Portable Applications
Charge Control in Battery Chargers
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Parameter
Symbol Value
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current (Note 1)
Steady TA = 25°C
State
TA = 85°C
t 5 s TA = 25°C
Power Dissipation
(Note 1)
Steady TA = 25°C
State
TA = 85°C
t 5 s TA = 25°C
Pulsed Drain Current tp = 10 ms
Operating Junction and Storage Temperature
VDSS
VGS
ID
PD
IDM
TJ,
TSTG
30
±20
4.9
3.5
6.7
1.3
0.7
2.5
20
−55 to
150
Source Current (Body Diode)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
IS 1.1
TL 260
Unit
V
V
A
W
A
°C
A
°C
THERMAL RESISTANCE RATINGS
Parameter
Symbol Max Unit
Junction−to−Ambient – Steady State (Note 1) RqJA
95 °C/W
Junction−to−Foot (Drain) Steady State (Note 1)
RqJF
20
Junction−to−Ambient – t 5 s (Note 1)
RqJA
50
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface Mounted on FR4 Board using 1 in sq. pad size
(Cu area = 1.127 in sq [1 oz] including traces).
www.DataSheet4U.com
http://onsemi.com
V(BR)DSS
30 V
RDS(on) Typ
30 mW @ 10 V
40 mW @ 4.5 V
D
ID Max
6.7 A
G
S
N−Channel MOSFET
MARKING DIAGRAM
8 AND PIN ASSIGNMENT
1
ChipFET
CASE 1206A
STYLE 1
D DDS
D2 M
G
1
D DDG
D2 = Specific Device Code
M = Month Code
G = Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping
NTHS4501NT1
NTHS4501NT1G
ChipFET
ChipFET
(Pb−Free)
3000/Tape & Reel
3000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2007
February, 2007 − Rev. 4
1
Publication Order Number:
NTHS4501N/D

1 page




NTHS4501N pdf
NTHS4501N
PACKAGE DIMENSIONS
ChipFETt
CASE 1206A−03
ISSUE H
HE
e1
D
8765
1234
E
b
e
q
c
L
5678
4321
A
0.05 (0.002)
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NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MOLD GATE BURRS SHALL NOT EXCEED 0.13 MM PER SIDE.
4. LEADFRAME TO MOLDED BODY OFFSET IN HORIZONTAL
AND VERTICAL SHALL NOT EXCEED 0.08 MM.
5. DIMENSIONS A AND B EXCLUSIVE OF MOLD GATE BURRS.
6. NO MOLD FLASH ALLOWED ON THE TOP AND BOTTOM LEAD
SURFACE.
MILLIMETERS
DIM MIN
NOM MAX
A 1.00
1.05
1.10
b 0.25
0.30
0.35
c 0.10 0.15 0.20
D 2.95
3.05
3.10
E 1.55
1.65
1.70
e 0.65 BSC
e1 0.55 BSC
L 0.28
0.35
0.42
H E 1.80
1.90
2.00
q 5° NOM
MIN
0.039
0.010
0.004
0.116
0.061
0.011
0.071
INCHES
NOM
0.041
0.012
0.006
0.120
0.065
0.025 BSC
0.022 BSC
0.014
0.075
5° NOM
MAX
0.043
0.014
0.008
0.122
0.067
0.017
0.079
STYLE 1:
PIN 1. DRAIN
2. DRAIN
3. DRAIN
4. GATE
5. SOURCE
6. DRAIN
7. DRAIN
8. DRAIN
2.032
1 0.08
SOLDERING FOOTPRINTS*
1
2.032
0.08
2.362
0.093
0.635
0.025
PITCH
2.362
0.093
1.727
0.068
0.457
8X
0.018
8X
0.66
0.026
Basic
ǒ mm Ǔ
inches
0.457
2X 0.018
2X
0.66
0.026
Style 1
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ǒ mm Ǔ
inches
http://onsemi.com
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