|
|
PDF HD74LV1GT126A Data sheet ( Hoja de datos )
| Número de pieza | HD74LV1GT126A | |
| Descripción | Bus Buffer Gate | |
| Fabricantes | Renesas Technology | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de HD74LV1GT126A (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
|
No Preview Available !
HD74LV1GT126A
Bus Buffer Gate with 3–state Output /
CMOS Logic Level Shifter
www.DataSheet4U.net
Description
REJ03D0124-0900
Rev.9.00
Mar 21, 2008
The HD74LV1GT126A has a bus buffer gate with 3–state output in a 5 pin package. Output is disabled when the
associated output enable (OE) input is low. To ensure the high impedance state during power up or power down, OE
should be connected to VCC through a pull-down resistor; the minimum value of the resistor is determined by the current
sourcing capability of the driver. The input protection circuitry on this device allows over voltage tolerance on the
input, allowing the device to be used as a logic–level translator from 3.0 V CMOS Logic to 5.0 V CMOS Logic or from
1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high-voltage power supply. Low voltage and high-
speed operation is suitable for the battery powered products (e.g., notebook computers), and the low power
consumption extends the battery life.
Features
• The basic gate function is lined up as Renesas uni logic series.
• Supplied on emboss taping for high-speed automatic mounting.
• TTL compatible input level.
Supply voltage range : 3.0 to 5.5 V
Operating temperature range : –40 to +85°C
• Logic-level translate function
3.0 V CMOS logic → 5.0 V CMOS logic (@VCC = 5.0 V)
1.8 V or 2.5 V CMOS logic → 3.3 V CMOS logic (@VCC = 3.3 V)
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V, Output : Z)
• Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
• All the logical input has hysteresis voltage for the slow transition.
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
HD74LV1GT126ACME CMPAK–5 pin
PTSP0005ZC-A
(CMPAK-5V)
HD74LV1GT126AVSE
VSON–5 pin
PUSN0005KA-A
(TNP-5DV)
Note: Please consult the sales office for the above package availability.
Package
Abbreviation
CM
VS
Taping Abbreviation
(Quantity)
E (3000 pcs/reel)
E (3000 pcs/reel)
REJ03D0124-0900 Rev.9.00, Mar 21, 2008
Page 1 of 7
1 page  
HD74LV1GT126A
Operating Characteristics
• CL = 50 pF
Item
Symbol VCC (V)
Power dissipation
capacitance
CPD 5.0
Ta = 25°C
Min Typ Max
— 11.5 —
Unit Test Conditions
pF f = 10 MHz
Test Circuit
VCC
VCC
Input
Pulse Generator
Z OUT = 50 Ω
Output
1 k Ω S1
CL =
15 or 50 pF
OPEN
*1 See under table
GND
TEST
tPLH / t PHL
tZH/ t HZ
tZL / t LZ
S1
OPEN
GND
VCC
Note: 1. CL includes probe and jig capacitance.
REJ03D0124-0900 Rev.9.00, Mar 21, 2008
Page 5 of 7
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet HD74LV1GT126A.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| HD74LV1GT126A | Bus Buffer Gate |  Hitachi Semiconductor |
| HD74LV1GT126A | Bus Buffer Gate | Renesas Technology |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |