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PDF HD74LV1GT14A Data sheet ( Hoja de datos )
| Número de pieza | HD74LV1GT14A | |
| Descripción | Inverter | |
| Fabricantes | Renesas Technology | |
| Logotipo |  |
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HD74LV1GT14A
Inverter with Schmitt-trigger Input /
CMOS Logic Level Shifter
www.DataSheet4U.net
Description
REJ03D0119-0700
Rev.7.00
Mar 21, 2008
The HD74LV1GT14A is high-speed CMOS schmitt-trigger inverter using silicon gate CMOS process. With CMOS
low power dissipation, it provides high-speed equivalent to LS–TTL series. The internal circuit of three stages
construction with buffer provides wide noise margin and stable output. The input protection circuitry on this device
allows over voltage tolerance on the input, allowing the device to be used as a logic–level translator from 3.0 V CMOS
Logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V CMOS Logic while operating at the high-voltage
power supply. Low voltage and high-speed operation is suitable for the battery powered products (e.g., notebook
computers), and the low power consumption extends the battery life.
Features
• The basic gate function is lined up as Renesas uni logic series.
• Supplied on emboss taping for high-speed automatic mounting.
• TTL compatible input level.
Supply voltage range : 3.0 to 5.5 V
Operating temperature range : –40 to +85°C
• Logic-level translate function
3.0 V CMOS logic → 5.0 V CMOS logic (@VCC = 5.0 V)
1.8 V or 2.5 V CMOS logic → 3.3 V CMOS logic (@VCC = 3.3 V)
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
• Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
• All the logical input has hysteresis voltage for the slow transition.
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
HD74LV1GT14ACME
CMPAK–5 pin
PTSP0005ZC-A
(CMPAK-5V)
HD74LV1GT14AVSE
VSON–5 pin
PUSN0005KA-A
(TNP-5DV)
Note: Please consult the sales office for the above package availability.
Package
Abbreviation
CM
VS
Taping Abbreviation
(Quantity)
E (3000 pcs/reel)
E (3000 pcs/reel)
REJ03D0119-0700 Rev.7.00, Mar 21, 2008
Page 1 of 6
1 page  
HD74LV1GT14A
Test Circuit
VCC
Pulse
generator
Input
50 Ω
Output
CL
Waveforms
Input
Note: CL includes probe and jig capacitance.
tr
90%
Vref
10%
tf
90%
Vref
10%
Output
50%
tPHL
50%
tPLH
VI
GND
VOH
VOL
VCC (V)
INPUTS
VI tr / tf
Vref
3.3±0.3 2.5 V ≤ 3.0 ns 50%
5.0±0.5 3 V ≤ 3.0 ns 1.5 V
Notes: 1. Input waveform : PRR ≤ 1 MHz, Zo = 50 Ω.
2. The output are measured one at a time with one transition per measurement.
REJ03D0119-0700 Rev.7.00, Mar 21, 2008
Page 5 of 6
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet HD74LV1GT14A.PDF ] | |
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