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PDF CAT24M01 Data sheet ( Hoja de datos )
| Número de pieza | CAT24M01 | |
| Descripción | 1 Mb I2C CMOS Serial EEPROM | |
| Fabricantes | ON Semiconductor | |
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CAT24M01
1 Mb I2C CMOS Serial
EEPROM
Description
The CAT24M01 is a 1024 kb Serial CMOS EEPROM, internally
organized as 131,072 words of 8 bits each.
It features a 256−byte page write buffer and supports the Standard
(100 kHz), Fast (400 kHz) and Fast−Plus (1 MHz) I2C protocol.
Write operations can be inhibited by taking the WP pin High (this
protects the entire memory).
External address pins make it possible to address up to four
CAT24M01 devices on the same bus.
Features
• Supports Standard, Fast and Fast−Plus I2C Protocol
• 1.8 V to 5.5 V Supply Voltage Range
• 256−Byte Page Write Buffer
• Hardware Write Protection for Entire Memory
• Schmitt Triggers and Noise Suppression Filters on I2C Bus Inputs
(SCL and SDA)
• Low Power CMOS Technology
• 1,000,000 Program/Erase Cycles
• 100 Year Data Retention
• Industrial and Extended Temperature Range
• 8−pin PDIP, SOIC, TSSOP and 8−pad UDFN Packages
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
VCC
SCL
A2, A1
WP
CAT24M01
SDA
VSS
Figure 1. Functional Symbol
http://onsemi.com
SOIC−8
W SUFFIX
CASE 751BD
UDFN−8*
HU5 SUFFIX
CASE 517BU
SOIC−8
X SUFFIX
CASE 751BE
PDIP−8
L SUFFIX
CASE 646AA
TSSOP−8*
Y SUFFIX
CASE 948AL
PIN CONFIGURATION
NC 1
VCC
A1 WP
A2 SCL
VSS SDA
PDIP (L), SOIC (W, X),
TSSOP (Y)*, UDFN (HU5)*
For the location of Pin 1, please consult the
corresponding package drawing.
* Contact factory for availability
Pin Name
A1, A2
SDA
SCL
WP
VCC
VSS
PIN FUNCTION
Function
Device Address
Serial Data
Serial Clock
Write Protect
Power Supply
Ground
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
© Semiconductor Components Industries, LLC, 2011
www.DatMaSahye,e2t04U11.n−etRev. 1
1
Publication Order Number:
CAT24M01/D
1 page  
CAT24M01
SCL
SDA
START
CONDITION
Figure 2. Start/Stop Timing
STOP
CONDITION
1 0 1 0 A2 A1 a16 R/W
DEVICE ADDRESS
Figure 3. Slave Address Bits
SCL FROM
MASTER
BUS RELEASE DELAY (TRANSMITTER)
18
BUS RELEASE DELAY (RECEIVER)
9
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
START
ACK DELAY (≤ tAA)
Figure 4. Acknowledge Timing
ACK SETUP (≥ tSU:DAT)
SCL
tSU:STA
SDA IN
tF tHIGH
tLOW
tLOW
tHD:STA
tHD:DAT
tR
tSU:DAT
SDA OUT
tAA tDH
Figure 5. Bus Timing
tSU:STO
tBUF
http://onsemi.com
5
5 Page 
CAT24M01
PACKAGE DIMENSIONS
TSSOP8, 4.4x3
CASE 948AL−01
ISSUE O
b
e
TOP VIEW
D
A2
E1 E
A
SYMBOL
A
A1
A2
b
c
D
E
E1
e
L
L1
θ
MIN
0.05
0.80
0.19
0.09
2.90
6.30
4.30
0.50
0º
NOM
0.90
3.00
6.40
4.40
0.65 BSC
1.00 REF
0.60
MAX
1.20
0.15
1.05
0.30
0.20
3.10
6.50
4.50
0.75
8º
c
q1
SIDE VIEW
A1
Notes:
(1) All dimensions are in millimeters. Angles in degrees.
(2) Complies with JEDEC MO-153.
L1
END VIEW
L
http://onsemi.com
11
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| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet CAT24M01.PDF ] | |
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