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W9425G6DH PDF даташит

Спецификация W9425G6DH изготовлена ​​​​«Winbond» и имеет функцию, называемую «4M X 4 BANKS X 16 BITS DDR SDRAM».

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Номер произв W9425G6DH
Описание 4M X 4 BANKS X 16 BITS DDR SDRAM
Производители Winbond
логотип Winbond логотип 

53 Pages
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W9425G6DH Даташит, Описание, Даташиты
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W9425G6DH
4M × 4 BANKS × 16 BITS DDR SDRAM
Table of Contents-
1. GENERAL DESCRIPTION............................................................................................................. 4
2. FEATURES .................................................................................................................................... 4
3. KEY PARAMETERS ...................................................................................................................... 5
4. PIN CONFIGURATION .................................................................................................................. 6
5. PIN DESCRIPTION........................................................................................................................ 7
6. BLOCK DIAGRAM ......................................................................................................................... 8
7. FUNCTIONAL DESCRIPTION....................................................................................................... 9
7.1 Power Up Sequence............................................................................................................ 9
7.2 Command Function ............................................................................................................. 9
7.2.1 Bank Activate Command ........................................................................................................9
7.2.2 Bank Precharge Command ....................................................................................................9
7.2.3 Precharge All Command ........................................................................................................9
7.2.4 Write Command .....................................................................................................................9
7.2.5 Write with Auto-precharge Command...................................................................................10
7.2.6 Read Command ...................................................................................................................10
7.2.7 Read with Auto-precharge Command ..................................................................................10
7.2.8 Mode Register Set Command ..............................................................................................10
7.2.9 Extended Mode Register Set Command ..............................................................................10
7.2.10 No-Operation Command ......................................................................................................10
7.2.11 Burst Read Stop Command..................................................................................................11
7.2.12 Device Deselect Command ..................................................................................................11
7.2.13 Auto Refresh Command .......................................................................................................11
7.2.14 Self Refresh Entry Command...............................................................................................11
7.2.15 Self Refresh Exit Command .................................................................................................11
7.2.16 Data Write Enable /Disable Command .................................................................................12
7.3 Read Operation ................................................................................................................. 12
7.4 Write Operation ................................................................................................................. 12
7.5 Precharge .......................................................................................................................... 13
7.6 Burst Termination .............................................................................................................. 13
7.7 Refresh Operation ............................................................................................................. 13
7.8 Power Down Mode ............................................................................................................ 13
7.9 Input Clock Frequency Change during Precharge Power Down Mode ............................ 14
7.10 Mode Register Operation .................................................................................................. 14
7.10.1 Burst Length field (A2 to A0) ................................................................................................14
Publication Release Date:Nov. 20, 2007
- 1 - Revision A7









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W9425G6DH Даташит, Описание, Даташиты
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W9425G6DH
7.10.2 Addressing Mode Select (A3)...............................................................................................14
7.10.3 CAS Latency field (A6 to A4)................................................................................................16
7.10.4 DLL Reset bit (A8) ................................................................................................................16
7.10.5 Mode Register /Extended Mode register change bits (BS0, BS1) ........................................16
7.10.6 Extended Mode Register field ..............................................................................................16
7.10.7 Reserved field ......................................................................................................................16
8. OPERATION MODE .................................................................................................................... 17
8.1 Simplified Truth Table........................................................................................................ 17
8.2 Function Truth Table ......................................................................................................... 18
8.3 Function Truth Table for CKE............................................................................................ 21
8.4 Simplified Stated Diagram ................................................................................................. 22
9. ELECTRICAL CHARACTERISTICS ............................................................................................ 23
9.1 Absolute Maximum Ratings............................................................................................... 23
9.2 Recommended DC Operating Conditions ......................................................................... 23
9.3 Capacitance....................................................................................................................... 24
9.4 Leakage and Output Buffer Characteristics ...................................................................... 24
9.5 DC Characteristics............................................................................................................. 25
9.6 AC Characteristics and Operating Condition..................................................................... 26
9.7 AC Test Conditions............................................................................................................ 28
10. SYSTEM CHARACTERISTICS FOR DDR SDRAM .................................................................... 30
10.1 Table 1: Input Slew Rate for DQ, DQS, and DM ............................................................... 30
10.2 Table 2: Input Setup & Hold Time Derating for Slew Rate................................................ 30
10.3 Table 3: Input/Output Setup & Hold Time Derating for Slew Rate .................................... 30
10.4 Table 4: Input/Output Setup & Hold Derating for Rise/Fall Delta Slew Rate .................... 30
10.5 Table 5: Output Slew Rate Characteristics (X16 Devices only) ........................................ 30
10.6 Table 6: Output Slew Rate Matching Ratio Characteristics .............................................. 31
10.7 Table 7: AC Overshoot/Undershoot Specification for Address and Control Pins ............. 31
10.8 Table 8: Overshoot/Undershoot Specification for Data, Strobe, and Mask Pins .............. 32
10.9 System Notes: ................................................................................................................... 33
11. TIMING WAVEFORMS ................................................................................................................ 35
11.1 Command Input Timing ..................................................................................................... 35
11.2 Timing of the CLK Signals ................................................................................................. 35
11.3 Read Timing (Burst Length = 4) ........................................................................................ 36
11.4 Write Timing (Burst Length = 4) ........................................................................................ 37
11.5 DM, DATA MASK (W9425G6DH) ..................................................................................... 38
11.6 Mode Register Set (MRS) Timing ..................................................................................... 39
11.7 Extend Mode Register Set (EMRS) Timing....................................................................... 40
Publication Release Date:Nov. 20, 2007
- 2 - Revision A7









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W9425G6DH Даташит, Описание, Даташиты
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W9425G6DH
11.8 Auto-precharge Timing (Read Cycle, CL = 2) ................................................................... 41
11.9 Auto-precharge Timing (Read cycle, CL = 2), continued .................................................. 42
11.10 Auto-precharge Timing (Write Cycle) ................................................................................ 43
11.11 Read Interrupted by Read (CL = 2, BL = 2, 4, 8) .............................................................. 44
11.12 Burst Read Stop (BL = 8) .................................................................................................. 44
11.13 Read Interrupted by Write & BST (BL = 8)........................................................................ 45
11.14 Read Interrupted by Precharge (BL = 8) ........................................................................... 45
11.15 Write Interrupted by Write (BL = 2, 4, 8) ........................................................................... 46
11.16 Write Interrupted by Read (CL = 2, BL = 8)....................................................................... 46
11.17 Write Interrupted by Read (CL = 3, BL = 4)....................................................................... 47
11.18 Write Interrupted by Precharge (BL = 8) ........................................................................... 47
11.19 2 Bank Interleave Read Operation (CL = 2, BL = 2) ......................................................... 48
11.20 2 Bank Interleave Read Operation (CL = 2, BL = 4) ......................................................... 48
11.21 4 Bank Interleave Read Operation (CL = 2, BL = 2) ......................................................... 49
11.22 4 Bank Interleave Read Operation (CL = 2, BL = 4) ......................................................... 49
11.23 Auto Refresh Cycle............................................................................................................ 50
11.24 Precharge/Activate Power Down Mode Entry and Exit Timing ......................................... 50
11.25 Input Clock Frequency Change during Precharge Power Down Mode Timing................. 50
11.26 Self Refresh Entry and Exit Timing ................................................................................... 51
12. PACKAGE SPECIFICATION ....................................................................................................... 52
12.1 TSOP 66 lI – 400 mil ......................................................................................................... 52
13. REVISION HISTORY ................................................................................................................... 53
Publication Release Date:Nov. 20, 2007
- 3 - Revision A7










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