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PDF HFT012 Data sheet ( Hoja de datos )

Número de pieza HFT012
Descripción 12-bit SAR type Analog-to-Digital converter
Fabricantes Kingbright Corporation 
Logotipo Kingbright Corporation Logotipo



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No Preview Available ! HFT012 Hoja de datos, Descripción, Manual

www.DataSheet4U.net
KING BILLION ELECTRONICS CO., LTD
駿億電子股份有限公司
HFT012
- Table of Contents -
1. General Description ___________________________________________________________________2
2. Features _____________________________________________________________________________2
3. Block Diagram _______________________________________________________________________3
4. Pin Description _______________________________________________________________________3
5. Pads Locations _______________________________________________________________________4
6. Configuration of ADC _________________________________________________________________5
7. Absolute Maximum Rating ____________________________________________________________11
8. Recommended Operating Conditions____________________________________________________11
9. AC/DC Characteristics________________________________________________________________11
10. Application Circuit_________________________________________________________________12
11. Updated History ___________________________________________________________________13
August 18, 2003
1
V1.0
This specification is subject to change without notice. Please contact sales person for the latest version before use.

1 page




HFT012 pdf
www.DataSheet4U.net
KING BILLION ELECTRONICS CO., LTD
駿億電子股份有限公司
HFT012
6. Configuration of ADC
Serial Interface
The CSL signal initiates the data transfer and conversion process, user shall don’t tie this pin to
ground directly. The falling edge of CSL takes the BUSY output and the serial bus out of three-state.
The first eight DCLK cycles are used to write to the Control Register via the DIN pin. The Control
Register is updated in stages as each bit is clocked in and once the converter has enough information
about the following conversion to set the input multiplexer and switches appropriately,
The converter enters the acquisition mode and if required, the internal switches are turned on. During the
acquisition mode the reference input data is updated. After the three DCLK cycles of acquisition, the
control word is complete (the power management bits are now updated) and the converter enters the
conversion mode. At this point the track and hold goes into hold mode and the input signal is sampled and
the BUSY output goes high (BUSY will return low on the next falling edge of DCLK). The internal
switches may also turn off at this point if in single-ended mode or temperature measurement mode. The
next 12 DCLK cycles are used to perform the conversion and to clock out the conversion result. If the
conversion is ratiometric (SER/#DFR Low), the internal switches are on during the conversion. A
thirteenth DCLK cycle is needed to allow the DSP/MCU to clock the LSB in. Three more DCLK cycles
will clock out the three trailing zeroes and complete the 24 DCLK transfer. The 24 DCLK cycles may be
provided from a DSP or via three bursts of eight clock cycles from a microcontroller.
Control Byte Description
The following diagram shows the typical operation of the HFT012 digital interface. This diagram
assumes that the source of the digital signals is a microcontroller or digital signal processor with a basic
serial interface. Each communication between the processor and the converter consists of eight clock
cycles. One complete conversion can be accomplished with three serial communications, for a total of 24
clock cycles on the DCLK input. The first eight clock cycles are used to provide the control byte via the
DIN pin. When the converter has enough information about the following conversion to set the input
multiplexer, switches, and reference inputs appropriately, the converter enters the acquisition (sample)
mode and, if needed, the internal switches are turned on. After three more clock cycles, the control byte is
complete and the converter enters the conversion mode. At this point, the input sample-and-hold goes into
the hold mode and the internal switches may turn off. The next 12th clock cycles accomplish the actual
A/D conversion. If the conversion is ratiometric (SER/#DFR Low), the internal switches are on during the
conversion. A 13th clock cycle is needed for the last bit of the conversion result. Three more clock cycles
are needed to complete the last byte (DOUT will be LOW). These will be ignored by the converter.
August 18, 2003
5
V1.0
This specification is subject to change without notice. Please contact sales person for the latest version before use.

5 Page





HFT012 arduino
www.DataSheet4U.net
KING BILLION ELECTRONICS CO., LTD
駿億電子股份有限公司
HFT012
7. Absolute Maximum Rating
Item
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature
Storage Temperature
Symbol
VDD
VIN
VO
TOP
TST
Rating
-0.5V ~ 6.0V
-0.5V ~ VDD+0.5V
-0.5V ~ VDD+0.5V
0°C ~ 70°C
-50°C ~ 100°C
Condition
8. Recommended Operating Conditions
Item
Supply Voltage
Input Voltage
Operating Temperature
Storage Temperature
Symbol
VDD
VIH
VIL
TOP
TST
Rating
2.4V ~ 5.5V
0.9 VDD ~ VDD
0.0V ~ 0.1VDD
0°C ~ 70°C
-50°C ~ 100°C
9. AC/DC Characteristics
Condition
Testing Condition: TEMP=25, VDD =3V±10%
Parameters
Symbol
Operation Voltage
Operation Current
Standby current
Throughput Rate
Input Voltage Ranges
Reference Input Range
Resolutions
No Missing Codes
INL
DNL
Offset Errors
Gain Errors
X+/Y+ Resistance
X-/Y- Resistance
Logical High Output Voltage
Logical Low Output Voltage
PENIRQL Low Output Voltage
Operation Temperature
VDD
IOP
ISTB
VOH
VOL
VOL
Min.
2.4
0
1.0
0
Typ.
220
125
12
TBD
TBD
TBD
TBD
TBD
TBD
TBD
0.8VDD
Max.
5.5
1
VREF
VDD
0.8
0.8
70
Unit
V
µA
µA
kSPS
V
V
Bits
Bits
LSB
LSB
LSB
LSB
V
V
V
Condition
August 18, 2003
11
V1.0
This specification is subject to change without notice. Please contact sales person for the latest version before use.

11 Page







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