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PDF HMC983LP5E Data sheet ( Hoja de datos )

Número de pieza HMC983LP5E
Descripción DC - 7 GHZ FRACTIONAL-N DIVIDER AND FREQUENCY SWEEPER
Fabricantes Hittite Microwave Corporation 
Logotipo Hittite Microwave Corporation Logotipo



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6
v00.0911
HMC983LP5E
DC - 7 GHZ FRACTIONAL-N DIVIDER
AND FREQUENCY SWEEPER
Typical Applications
The HMC983LP5E is suitable for:
• Test Equipment
• Portable Instruments
• High Performance Fractional-N Frequency Synthe-
sizers with Ultra Low Spurious
• Stand-Alone Divider and/or Delta-Sigma Modulator
Features
Wideband: DC - 7 GHz Input
-20-bit Frequency Divider
Low Noise: -160 dBc/Hz
Low Spurious: Largest Spurious - 95 dBc
48-bit 100 MHz Delta-Sigma Modulator (DSM)
- Configurable DSM Size
- Programmable Seed
Functional Diagram
Features (Continued)
Integrated Frequency Sweeper
- Linear, Coherent Sweeps
- 2-Way, 1-Way, & User Defined Sweep Modes
- Automatic or Triggered
- Programmable Seed
-SPI & External Triggering
5-GPIO’s, can be used for External DSM
Cycle Slip Prevention Support with PFD Chip
(HMC984LP4E)
Differential VCO Input & Divider Output
Programmable Output Current Control:
-5 mA to 17.5 mA Open Collector Output Driver
32 pin, 5 x 5 mm, LP5 Package
General Description
HMC983LP5E is a fractional frequency divider
targeted for fractional-N frequency synthesis, and
stand-alone low noise frequency divider applications
that require exceptional spurious performance.
Although the HMC983LP5E can work with any VCO
and/or compatible Phase Detector, best performance
and features will be achieved when paired with the
companion part, the HMC984LP4E.
Fabricated in SiGe BiCMOS process, the
HMC983LP5E features a 48-bit Delta Sigma
Fractional Modulator (DSM) with programmable
phase accumulator size, enabling precise control of
frequency step size and resolution. Integrated DSM
can generate frequencies with nearly 0 Hz frequency
error. The DSM also includes a built-in programmable
frequency sweep capability, with various automatic
and user defined sweep modes and triggering options,
including hardware trigger pin, or SPI trigger with
optional delayed trigger.
HMC983LP5E is a versatile part capable of various
configurations. It has 5 general purpose I/Os (GPIOs).
DSM outputs are made available from the GPIO port,
enabling the HMC983LP5E to import and/or export
DSM sequences for various configuration options.
HMC983LP5E divider outputs are differential, open
collector with programmable current to accommodate
different off-chip loads.
6-1
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
978-250-3343 tel • 978-250-3373 fax • Order On-line at www.hittite.com
Application Support: [email protected]
Datasheet pdf - http://www.DataSheet4U.net/

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HMC983LP5E pdf
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6
6-5
v00.0911
Figure 13. 100 MHz Output Swing vs
Buffer Current [7]
0.9
0.85
0.8
0.75
0.7
0.65
0.6 -40 C
+27 C
0.55
+85 C
0.5
12
13 14 15 16 17
OUTPUT BUFFER CURRENT (mA)
18
Figure 15. Two Way Frequency Sweep,
50 MHz PFD [8]
7000
6900
6800
6700
6600
6500
6400
0
5 10 15
TIME (ms)
20
HMC983LP5E
DC - 7 GHZ FRACTIONAL-N DIVIDER
AND FREQUENCY SWEEPER
Figure 14. Input Return Loss
0
-5
-10
-15
-20
0
2000
4000
6000
FREQUENCY (MHz)
8000
Figure 16. One Way Frequency Sweep,
10 MHz PFD and 10 Hz external trigger [8]
7000
6900
6800
6700
6600
6500
6400
0
200 400 600 800 1000
TIME (ms)
Figure 17. PLL Cycle Slip Prevention,
100 MHz PFD [8]
7050
7000
CSP Enabled
Reg0Eh[18:15] = 1h
6950
CSP Enabled
Reg0Eh[18:15] = 8h
6900
Figure 18. PLL Cycle Slip Prevention,
50 MHz PFD [8]
7050
CSP Enabled
7000 Reg0Eh[18:15] = Fh
6950
CSP Enabled
Reg0Eh[18:15] = 5h
6900
6850
6800
Cycle Slip Disabled
6850
6800
Cycle Slip Disabled
6750
6750
6700
0
50 100 150 200 250 300
TIME (us)
6700
0
50 100 150 200 250 300
TIME (us)
[7] Measured with 50 Ω impedance per line. Buffer current is controled via Reg 0Fh[4:2].
[8] Measured with HMC983LP5E/HMC984LP4E chip set as fractional-N synthesizer. Crystal input frequency = 100 MHz, CP current = 2.5 mA, CP
offset current = 245 uA, Loop filter bandwidth = 87 KHz, DSM Mode B selected. Cycle Slip Prevention (CSP) is disabled in HMC984LP4E by setting
Reg 01h [4] = 0. Setting Reg 01h [4] = 1 enables CSP in the two chip PLL.
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
978-250-3343 tel • 978-250-3373 fax • Order On-line at www.hittite.com
Application Support: [email protected]
Datasheet pdf - http://www.DataSheet4U.net/

5 Page





HMC983LP5E arduino
www.DataSheet.co.kr
v00.0911
HMC983LP5E
DC - 7 GHZ FRACTIONAL-N DIVIDER
AND FREQUENCY SWEEPER
Evaluation PCB Block Diagram
6
6 - 11
For price, delivery and to place orders: Hittite Microwave Corporation, 2 Elizabeth Drive, Chelmsford, MA 01824
978-250-3343 tel • 978-250-3373 fax • Order On-line at www.hittite.com
Application Support: [email protected]
Datasheet pdf - http://www.DataSheet4U.net/

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