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PDF NL8060BC31-17E Data sheet ( Hoja de datos )
| Número de pieza | NL8060BC31-17E | |
| Descripción | Display Module | |
| Fabricantes | NEC | |
| Logotipo |  |
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TFT COLOR LCD MODULE
NL8060BC31-17E
30.8cm (12.1 Type)
SVGA
DATA SHEET
(2nd edition)
All information is subject to change without notice.
Document Number: EN0553EJ2V0DS00 (2nd edition)
Published date: March 2002 N CP(N)
ã NEC Corporation
2002 All rights reserved.
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NL8060BC31-17E
1. OUTLINE
1.1 STRUCTURE AND PRINCIPLE
NL8060BC31-17E module is composed of the amorphous silicon thin film transistor liquid crystal
display (a-Si TFT LCD) panel structure with driver LSIs for driving the TFT (Thin Film Transistor) array
and a backlight unit.
The a-Si TFT LCD panel structure is injected liquid crystal material into a narrow gap between the TFT
array glass substrate and a color-filter glass substrate.
Color (Red, Green, Blue) data signals from a host system (e.g. PC, signal generator, etc.) are modulated
into best form for active matrix system by a signal processing board, and sent to the driver LSIs which
drive the individual TFT arrays.
The TFT array as an electro-optical switch regulates the amount of transmitted light from the backlight
assembly, when it is controlled by data signals. Color images are created by regulating the amount of
transmitted light through the TFT array of red, green and blue dots.
1.2 APPLICATIONS
• Display terminal for control system
1.3 FEATURES
• High luminance
• Wide viewing angle
• High contrast
• 6-bit digital RGB signals
• Reversible-scan direction
• Edge light type
• Replaceable lamp for backlight unit (Inverter less)
• Acquisition product for UL/c-UL (File number: E170632)
DATA SHEET EN0553EJ2V0DS00
5
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NL8060BC31-17E
4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 Sequence for LCD panel signal processing board
VCC 3.0V or 4.7V
Note1
0V
Display and
function signals
Note2
ON
Tr < 30ms
0ms < t < 35ms
VALID period
OFF
Toff > 50ms
0ms < t < 35ms
Note1: In terms of voltage variation (voltage drop) while VCC rising edge is below 3.0V in
"VCC = 3.3V" or 4.7V in "VCC = 5.0V", a protection circuit may work, and then this
product may not work.
Note2: Display (CLK, Hsync, Vsync, DE, R0 to R5, G0 to G5, B0 to B5) and function (DPSR)
signals must be Low or High-impedance, exclude the VALID period (See above sequence
diagram), in order to avoid that internal circuits is damaged.
If some of display and function signals of this product are cut while this product is
working, even if the signal input to it once again, it might not work normally. If customer
stops the display and function signals, they should be cut VCC.
4.4.2 Sequence for backlight inverter (Option)
Display and
function signals
Note1
Note2
VALID period
VDDB
Note1: These are display and function signals for LCD panel signal processing board.
Note2: The backlight inverter voltage (VDDB) should be inputted within the valid period of
display and function signals, in order to avoid unstable data display.
DATA SHEET EN0553EJ2V0DS00
11
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