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PDF NL6448BC26-08D Data sheet ( Hoja de datos )
| Número de pieza | NL6448BC26-08D | |
| Descripción | Display Module | |
| Fabricantes | NEC | |
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TFT COLOR LCD MODULE
NL6448BC26-08D
21cm (8.4 Type)
VGA
LVDS interface (1port)
DATA SHEET
DOD-PD-1208 (2nd edition)
This DATA SHEET is updated document from
DOD-PD-1159(1).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PD-1208 (2nd edition) 1 © NEC LCD Technologies, Ltd.
Published date: November 2005 CP(N)
2005 All rights reserved.
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NL6448BC26-08D
2. GENERAL SPECIFICATIONS
Display area
170.88 (H) × 128.16 (V) mm
Diagonal size of display 21cm (8.4 inches)
Drive system
Display color
Pixel
a-Si TFT active matrix
16,777,216 colors (At 8-bit input, FRC terminal= High)
262,144 colors (At 6-bit input, FRC terminal= Low or Open)
640 (H) × 480 (V) pixels
Pixel arrangement
RGB (Red dot, Green dot, Blue dot) vertical stripe
Dot pitch
0.089 (H) × 0.267 (V) mm
Pixel pitch
0.267 (H) × 0.267 (V) mm
Module size
200.0 (W) × 152.0 (H) × 10.5 (D) mm (typ.)
Weight
330g (typ.)
Contrast ratio
800:1 (typ.)
Viewing angle
At the contrast ratio ≥10:1
• Horizontal: Right side 85° (typ.), Left side 85° (typ.)
• Vertical: Up side 85° (typ.), Down side 85° (typ.)
Designed viewing direction Viewing angle with optimum grayscale (γ=2.2): normal axis (perpendicular)
Polarizer surface
Antiglare
Polarizer pencil-hardness
Color gamut
Response time
Luminance
Signal system
Power supply voltage
3H (min.) [by JIS K5400]
At LCD panel center
72% (typ.) [against NTSC color space]
Ton+Toff (10%←→ 90%)
20ms (typ.)
At IBL= 5.0mArms/lamp
400cd/m2 (typ.)
LVDS 1port (Receiver: THC63LVDF84A, THine Electronics Inc. or equivalent)
[8bit/6bit digital signals for data of RGB colors, Dot clock (CLK),
Data enable (DE)]
LCD panel signal processing board: 3.3V
Edge light type: 2 cold cathode fluorescent lamps
Backlight
Replaceable part
• Lamp holder set: Type No. 84LHS06
Recommended inverter (Option)
• Inverter: Type No. 84PW031, 84PW041
Power consumption
At IBL=5.0mArms / lamp, Checkered flag pattern
5.4W (typ., Power dissipation of the inverter is not included.)
☆
DATA SHEET DOD-PD-1208 (2nd edition)
5
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4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
VCC
Note1
0V
ON
3.0V
10µs ≤Tr< 50ms
Display signals*,
Function signals
Note2
0V
0ms <t< 35ms
VALID period
NL6448BC26-08D
OFF
ON
0.3V
Toff≥ 50ms
0ms <t< 35ms
* These signals should be measured at the terminal of 100Ω resistance.
Note1: In terms of voltage variation (voltage drop) while VCC rising edge is below 3.0V, a protection
circuit may work, and then this product may not work.
Note2: Display signals (D0+/-, D1+/-, D2+/-, D3+/- and CK+/-) and function signals (DPS and FRC)
must be Low or High-impedance, exclude the VALID period (See above sequence diagram), in
order to avoid that internal circuits is damaged.
If some of display and function signals of this product are cut while this product is working,
even if the signal input to it once again, it might not work normally. VCC should be cut when
the display and function signals are stopped.
4.4.2 Inverter (Option)
Display signals,
Function signals
Note1
Note2
VALID period
VDDB
Note1: These are the display and function signals for LCD panel signal processing board.
Note2: The backlight should be turned on within the valid period of display and function signals, in
order to avoid unstable data display.
DATA SHEET DOD-PD-1208 (2nd edition)
11
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