|
|
PDF S25FL204K Data sheet ( Hoja de datos )
| Número de pieza | S25FL204K | |
| Descripción | 4-Mbit 3.0V Serial Flash Memory | |
| Fabricantes | SPANSION | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de S25FL204K (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
S25FL204K
4-Mbit 3.0V Serial Flash Memory with Uniform 4 kB Sectors
Data Sheet (Preliminary)
S25FL204K Cover Sheet
Notice to Readers: This document states the current technical specifications regarding the Spansion
product(s) described herein. Each product described hereinwww.DataSheet.net/ may be designated as Advance Information,
Preliminary, or Full Production. See Notice On Data Sheet Designations for definitions.
Publication Number S25FL204K_00
Revision 05 Issue Date August 14, 2012
Datasheet pdf - http://www.DataSheet4U.co.kr/
1 page  
Data Sheet (Preliminary)
Figures
Figure 2.1
Figure 5.1
Figure 6.1
Figure 6.2
Figure 8.1
Figure 8.2
Figure 8.3
Figure 8.4
Figure 8.5
Figure 8.6
Figure 8.7
Figure 8.8
Figure 8.9
Figure 8.10
Figure 8.11
Figure 8.12
Figure 8.13
Figure 8.14
Figure 8.15
Figure 8.16
Figure 9.1
Figure 9.2
Figure 9.3
Figure 9.4
Figure 9.5
8-pin SOIC (150/208 mil) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Memory Organization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
SPI Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Hold Condition Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Write Enable Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Write Disable Command Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Read Status Register Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Write Status Register Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Read Data Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Fast Read Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Fast Read Dual Output Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Page Program Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Sector Erase Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Block Erase Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Chip Erase Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Deep Power-down Command Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Release Deep Power-down Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Release Deep Power-down / Device ID Command Sequence . . . . . . . . . . . . . . . . . . . . . . . 25
Read Manufacturer / Device ID Command Sequence. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Read JEDEC ID Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Power-up Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
AC Measurement I/O Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Serial Output Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Hold Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
www.DataSheet.net/
August 14, 2012 S25FL204K_00_05
S25FL204K
5
Datasheet pdf - http://www.DataSheet4U.co.kr/
5 Page 
Data Sheet (Preliminary)
6. Functional Description
6.1
SPI Modes
The S25FL204K device can be driven by an embedded microcontroller (bus master) in either of the two
following clocking modes.
Mode 0 with Clock Polarity (CPOL) = 0 and, Clock Phase (CPHA) = 0
Mode 3 with CPOL = 1 and, CPHA = 1
For these two modes, input data into the device is always latched in on the rising edge of the SCK signal and
the output data is always available from the falling edge of the SCK clock signal. The difference between the
two modes is the clock polarity when the bus master is in standby mode and not transferring any data.
SCK will stay at logic low state with CPOL = 0, CPHA = 0
SCK will stay at logic high state with CPOL = 1, CPHA = 1
CS#
SC K
Mode3
Mode0
Figure 6.1 SPI Modes
Mode 3
Mode 0
SI/IO0
SO
B it7 B it6
MSB
B it5 B it4 B it3 B it2 B it1 B it0
H igh Im pedance
B it7 B it6
MSB
DONT CARE
B it5 B it4 B it3 B it2 B it1 B it0
www.DataSheet.net/
6.2
6.3
Dual Output SPI
The S25FL204K supports Dual Output Operation when using the “Fast Read with Dual Output” (3B hex)
command. This feature allows data to be transferred from the Serial Flash at twice the rate possible with the
standard SPI. This command can be used to quickly download code from Flash to RAM upon Power-up
(Code-shadowing) or for applications that cache code-segments to RAM for execution.
The Dual Output feature simply allows the SPI data input pin (SI) to also serve as an output during this
command. All other operations use the standard SPI interface with single signal. The host keeps CS# low and
HOLD# high. The Write Protect (WP#) signal is ignored. The memory drives data on the SI/IO0 and SO
signals during the dual output cycles. The next interface state continues to be Dual Output Cycle until the host
returns CS# to high ending the command.
Hold Function
The Hold (HOLD#) signal is used to pause any serial communications with the S25FL204K device without
deselecting the device or stopping the serial clock. To enter the Hold condition, the device must be selected
by driving the CS# input to the logic low state. It is recommended that the user keep the CS# input low state
during the entire duration of the Hold condition. This is to ensure that the state of the interface logic remains
unchanged from the moment of entering the Hold condition. If the CS# input is driven to the logic high state
while the device is in the Hold condition, the interface logic of the device will be reset. To restart
communication with the device, it is necessary to drive HOLD# to the logic high state while driving the CS#
signal into the logic low state. This prevents the device from going back into the Hold condition.
The Hold condition starts on the falling edge of the Hold (HOLD#) signal, provided that this coincides with
SCK being at the logic low state. If the falling edge does not coincide with the SCK signal being at the logic
low state, the Hold condition starts whenever the SCK signal reaches the logic low state. Taking the HOLD#
August 14, 2012 S25FL204K_00_05
S25FL204K
11
Datasheet pdf - http://www.DataSheet4U.co.kr/
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet S25FL204K.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| S25FL204K | 4-Mbit 3.0V Serial Flash Memory | SPANSION |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |