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Número de pieza | NCV7471 | |
Descripción | System Basis Chip | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de NCV7471 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! NCV7471, NCV7471A
System Basis Chip with a
High-Speed CAN, Two LINs
and a Boost-Buck DC/DC
Converter
NCV7471(A) is a System Basis Chip (SBC) integrating functions
typically found in automotive Electronic Control Units (ECUs) in the
body domain. NCV7471 provides and monitors the low−voltage
power supplies for the application microcontroller and other loads,
monitors the application software via a watchdog and includes
high−speed CAN and LIN transceivers allowing the ECU to host
multiple communication nodes or to act as a gateway unit. The
on−chip state controller ensures safe power−up sequence and supports
low−power modes with a configurable set of features including
wakeup from the communication buses or by a local digital signal
WU. The status of several NCV7471(A) internal blocks can be read by
the microcontroller through the serial peripheral interface or can be
used to generate an interrupt request.
www.onsemi.com
SSOP36−EP
DQ SUFFIX
CASE 940AB
MARKING DIAGRAM
XXXX
AWLYYWWG
G
Features
• Control Logic
♦ Ensures safe power−up sequence and the correct reaction to
different supply conditions
XXXX = NCV7471−5 or NCV7471A−5
A = Assembly Location
WL = Wafer Lot
♦ Controls mode transitions including the power management and
wakeup treatment − bus wakeups, local wakeups (via WU pin) and
cyclic wakeups (through the on−chip timer)
♦ Generates reset and interrupt requests
YY = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
• Serial Peripheral Interface
♦ Operates with 16−bit frames
♦ Ensures communication with the ECU’s microcontroller unit
♦ Mode settings, chip status feedback and watchdog are accessible
ORDERING INFORMATION
See detailed ordering and shipping information on page 50 of
this data sheet.
through eight twelve−bits registers
• 5 V VOUT Supply from a DC/DC Converter
♦ Can be used as a wake−up source or as a logical
♦ Can deliver up to 500 mA with accuracy of ±2%
♦ Supplies typically the ECU’s microcontroller
input polled through SPI
• Protection and Monitoring Functions
• 5 V VOUT2 Low−drop Output Regulator
♦ Monitoring of the main supply through the V_MID
♦ Can supply external loads – e.g. sensors
♦ Controlled by SPI and the state machine
♦ Protected against short to the car battery
• A High−speed CAN Transceiver
♦ ISO11898−2 and ISO11898−5 compliant
♦ Communication speed up to 1 Mbps
♦ TxD dominant time−out protection
• Two LIN Transceivers
♦ LIN2.X and J2602 compliant
♦ TxD dominant time−out protection
• Wakeup Input WU
♦ Edge−sensitive high−voltage input
point
♦ Monitoring of VOUT supply output with
programmable threshold
♦ VOUT2 supply diagnosis through SPI and interrupt
♦ Thermal warning and thermal shutdown protection
♦ Programmable watchdog monitoring the ECU
software
• NCV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change
Requirements; AEC−Q100 Qualified and PPAP
Capable
• These Devices are Pb−Free, Halogen Free/BFR Free
and are RoHS Compliant
© Semiconductor Components Industries, LLC, 2015
August, 2015 − Rev. 4
1
Publication Order Number:
NCV7471/D
1 page NCV7471, NCV7471A
APPLICATION INFORMATION
Figure 2. Example Application Diagram
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5
5 Page NCV7471, NCV7471A
CAN Mode
CAN Off
CAN Wake−up
CAN Receive−only
CAN Normal
CAN Supply
Bias of Bus
Pins
V_MID
to GND
VCC_CAN
to VCC_CAN/2
CANH/CANL
TxDC
RxDC
CAN wakeup
detected
Wakeup flag
read & cleared
Figure 7. CAN Transceiver Modes
t_TxDC_timeout
In CAN Off mode, the CAN transceiver is fully
deactivated. Pin RxDC stays High (as long as VOUT is
provided) and logical level on TxDC is ignored. The bus
pins are weakly biased to ground via the input impedance.
In CAN Wakeup mode, the CAN transceiver, being
supplied purely from V_MID pin, detects wakeups on the
CAN lines. A valid wakeup on the CAN bus corresponds to
a pattern of two dominants at least t_CAN_wake_dom long,
interleaved by a recessive at least t_CAN_wake_rec long.
The total length of the pattern may not exceed
t_CAN_wake_timeout. The CAN wakeup handling is
illustrated in Figure 8.
In function of the current operating mode, a CAN wakeup
can lead either to an interrupt request or to a reset. A CAN
wakeup is also indicated by a Low level on the RxDC pin
(which otherwise stays High as long as VOUT is available).
Logical level on TxDC pin is ignored. The bus pins remain
weakly biased to ground in the wakeup CAN mode.
< t_CAN_wake_dom
> t_CAN_wake_dom
CAN wakeup
detected
> t_CAN_wake_dom
> t_CAN_wake_rec
CANH/CANL
dominant too
short
< t_CAN_wake_timeout
Wakeup flag
read&cleared
via SPI
RSTN
INTN
INTN
RxDC
Figure 8. CAN Wakeup Detection
www.onsemi.com
11
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet NCV7471.PDF ] |
Número de pieza | Descripción | Fabricantes |
NCV7471 | System Basis Chip | ON Semiconductor |
NCV7471A | System Basis Chip | ON Semiconductor |
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