NCP334 PDF даташит
Спецификация NCP334 изготовлена «ON Semiconductor» и имеет функцию, называемую «(NCP334 / NCP335) 2A Ultra-Small Controlled Load Switch». |
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Детали детали
Номер произв | NCP334 |
Описание | (NCP334 / NCP335) 2A Ultra-Small Controlled Load Switch |
Производители | ON Semiconductor |
логотип |
10 Pages
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NCP334, NCP335
2A Ultra-Small Controlled
Load Switch with
Auto-Discharge Path
The NCP334 and NCP335 are low Ron MOSFET controlled by
external logic pin, allowing optimization of battery life, and portable
device autonomy.
Indeed, due to a current consumption optimization with PMOS
structure, leakage currents are eliminated by isolating connected IC’s
on the battery when not used.
Output discharge path is also embedded to eliminate residual
voltages on the output rail in the NCP335.
Proposed in wide input voltage range from 1.2 V to 5.5 V, and a very
small 0.96 x 0.96 mm WLCSP4, 0.5 mm pitch.
Features
• 1.2 V – 5.5 V Operating Range
• 47 mW P MOSFET at 3.3 V
• DC Current Up to 2 A
• Output Auto−discharge (NCP335)
• Active high EN pin
• WLCSP4 0.96 x 0.96 mm
• ESD Ratings: 4 kV Human Body Model, 2 kV CDM,
• 250 V Machine Model
• These are Pb−Free Devices
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Typical Applications
• Mobile Phones
• Tablets
• Digital Cameras
• GPS
• Portable Devices
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WLCSP4
CASE 567FG
MARKING
DIAGRAM
1
XX
XX = Specific Device Code
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
PIN DIAGRAM
12
A OUT
IN
B GND
EN
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 9 of this data sheet.
© Semiconductor Components Industries, LLC, 2012
August, 2012 − Rev. 1
1
Publication Order Number:
NCP334/D
datasheet pdf - http://www.DataSheet4U.net/
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NCP334, NCP335
VOUT
B+
U5
A2 IN OUT A1
7 AVIN
SW 2
1
2
B2
EN
EN GND
NCP335
B1
NCP63xy/WDFN8
5 EN
FB 4
MODE/PG 6
EN
Figure 1. Typical Application Circuit
PIN FUNCTION DESCRIPTION
Pin Name Pin Number
Type
IN A2 POWER
GND
EN
OUT
B1 POWER
B2 INPUT
A1 OUTPUT
Description
Load−switch input voltage; connect a 1 mF or greater ceramic capacitor from IN to GND as
close as possible to the IC.
Ground connection.
Enable input, logic high turns on power switch.
Load−switch output; connect a 1 mF ceramic capacitor from OUT to GND as close as pos-
sible to the IC is recommended.
BLOCK DIAGRAM
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IN: Pin A2
EN: Pin B2
Cloognitcrol
Gate driver and soft
start control
EN block
OUT: Pin A1
Optional:
NCP335
GND: Pin B1
Figure 2. Block Diagram
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2
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NCP334, NCP335
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
IN, OUT, EN, Pins
From IN to OUT Pins: Input/Output
Maximum Junction Temperature
Storage Temperature Range
Human Body Model (HBM) ESD Rating are (Notes 1 and 2)
VEN , VIN,
VOUT
VIN,
VOUT
TJ
TSTG
ESD HBM
0.3 to + 7.0
0 to + 7.0
−40 to + 125
−40 to + 150
4000
V
V
°C
°C
V
Machine Model (MM) ESD Rating are (Notes 1 and 2)
ESD MM
250
V
Charge Device Model (CDM) ESD Rating are (Notes 1 and 2)
ESD CDM
2000
V
Latch−up protection (Note 3)
− Pins IN, OUT, EN
LU mA
100
Moisture Sensitivity (Note 4)
MSL
Level 1
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. According to JEDEC standard JESD22−A108.
2. This device series contains ESD protection and passes the following tests:
Human Body Model (HBM) ±4.0 kV per JEDEC standard: JESD22−A114 for all pins.
Machine Model (MM) ±250 V per JEDEC standard: JESD22−A115 for all pins.
Charge Device Model (CDM) ±2.0 kV per JEDEC standard: JESD22−C101 for all pins.
3. Latch up Current Maximum Rating: ±100 mA per JEDEC standard: JESD78 class II.
4. Moisture Sensitivity Level (MSL): 1 per IPC/JEDEC standard: J−STD−020.
OPERATING CONDITIONS
Symbol
Parameter
Conditions
Min Typ Max Unit
VIN
VEN
TA
CIN
COUT
RqJA
IOUT
PD
Operational Power Supply
Enable Voltage
Ambient Temperature Range
Decoupling input capacitor
Decoupling output capacitor
Thermal Resistance Junction to Air
Maximum DC current
Power Dissipation Rating (Note 6)
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WLCSP package (Note 5)
1.2
0
−40
1
1
TA ≤ 25
°C
WLCSP
package
25
100
0.5
5.5
5.5
+ 85
2
V
°C
mF
mF
°C/W
A
W
8T5A°=C
WLCSP
package
0.2
W
5. The RqJA is dependent of the PCB heat dissipation and thermal via.
6. The maximum power dissipation (PD) is given by the following formula:
PD
+
TJMAX *
RqJA
TA
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