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74C173 PDF даташит

Спецификация 74C173 изготовлена ​​​​«National Semiconductor» и имеет функцию, называемую «TRI-STATE Quad D Flip-Flop».

Детали детали

Номер произв 74C173
Описание TRI-STATE Quad D Flip-Flop
Производители National Semiconductor
логотип National Semiconductor логотип 

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74C173 Даташит, Описание, Даташиты
February 1988
MM54C173 MM74C173 TRI-STATE Quad D Flip-Flop
General Description
The MM54C173 MM74C173 TRI-STATE quad D flip-flop is
a monolithic complementary MOS (CMOS) integrated circuit
constructed with N- and P-channel enhancement transis-
tors The four D-type flip-flops operate synchronously from a
common clock The TRI-STATE output allows the device to
be used in bus-organized systems
The outputs are placed in the TRI-STATE mode when either
of the two output disable pins are in the logic ‘‘1’’ level The
input disable allows the flip-flops to remain in their present
states without disrupting the clock If either of the two input
disables are taken to a logic ‘‘1’’ level the Q outputs are fed
back to the inputs and in this manner the flip-flops do not
change state
Clearing is enabled by taking the input to a logic ‘’1’’ level
Clocking occurs on the positive-going transition
Features
Y Supply voltage range
3V to 15V
Y Tenth power TTL compatible
Drive 2 LPTTL loads
Y High noise immunity
Y Low power
0 45 VCC (typ )
Y Medium speed operation
Y High impedance TRI-STATE
Y Input disable without gating the clock
Applications
Y Automotive
Y Data terminals
Y Instrumentation
Y Medical electronics
Y Alarm systems
Y Industrial electronics
Y Remote metering
Y Computers
Connection Diagram
Dual-In-Line Package
Truth Table
Top View
Order Number MM54C173 or MM74C173
TL F 5898 – 2
(Both Output Disables Low)
tn
Data Input Disable
Data
Input
Logic ‘‘1’’ on One or Both Inputs
Logic ‘‘0’’ on Both Inputs
Logic ‘‘0’’ on Both Inputs
X
1
0
tna1
Output
Qn
1
0
TRI-STATE is a registered trademark of National Semiconductor Corporation
C1995 National Semiconductor Corporation TL F 5898
RRD-B30M105 Printed in U S A
Free Datasheet http://www.datasheet4u.com/









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74C173 Даташит, Описание, Даташиты
Absolute Maximum Ratings (Note 1)
If Military Aerospace specified devices are required
please contact the National Semiconductor Sales
Office Distributors for availability and specifications
Voltage at Any Pin
Operating Temperature Range
MM54C173
MM74C173
b0 3V to VCC a0 3V
b55 C to a125 C
b40 C to a85 C
Storage Temperature Range
b65 C to a150 C
Maximum VCC Voltage
Power Dissipation (PD)
Dual-In-Line
Small Outline
Operating VCC Range
Lead Temperature (Soldering 10 seconds)
18V
700 mW
500 mW
3V to 15V
260 C
DC Electrical Characteristics Min Max limits apply across temperature range unless otherwise specified
Symbol
Parameter
Conditions
Min Typ Max Units
CMOS TO CMOS
VIN(1)
Logical ‘‘1’’ Input Voltage
VIN(0)
Logical ‘‘0’’ Input Voltage
VOUT(1)
Logical ‘‘1’’ Output Voltage
VOUT(0)
Logical ‘‘0’’ Output Voltage
IIN(1)
IIN(0)
IOZ
Logical ‘‘1’’ Input Current
Logical ‘‘0’’ Input Current
Output Current in High
Impedance State
ICC Supply Current
LOW POWER TTL CMOS INTERFACE
VCC e 5V
VCC e 10V
VCC e 5V
VCC e 10V
VCC e 5V
VCC e 10V
VCC e 5V
VCC e 10V
VCC e 15V
VCC e 15V VO e 15V
VCC e 15V VO e 0V
VCC e 15V
35
80
45
90
b1 0
b1 0
15
20
0 005
0 005
0 001
0 001
0 05
05
10
10
10
300
V
V
V
V
V
V
V
V
mA
mA
mA
mA
mA
VIN(1)
Logical ‘‘1’’ Input Voltage
54C VCC e 4 5V
74C VCC e 4 5V
VCCb1 5
VCCb1 5
VIN(0)
Logical ‘‘0’’ Input Voltage
54C VCC e 4 5V
74C VCC e 4 75V
VOUT(1)
Logical ‘‘1’’ Output Voltage
54C VCC e 4 5V IO e b360 mA
74C VCC e 4 75V IO e b360 mA
24
24
VOUT(1)
Logical ‘‘0’’ Output Voltage
54C VCC e 4 5V IO e 360 mA
74C VCC e 4 75V IO e 360 mA
tpd0 tpd1
Propagation Delay Time to
a Logical ‘‘0’’ or Logical
‘‘1’’ from Clock
VCC e 5V CL e 50 pF
TA e 25 C
OUTPUT DRIVE (See 54C 74C Family Characteristics Data Sheet) (Short Circuit Current)
500
08
08
04
04
V
V
V
V
V
V
V
V
ns
ISOURCE
Output Source Current
VCC e 5V VIN(0) e 0V
TA e 25 C VOUT e 0V
b1 75
mA
ISOURCE
Output Source Current
VCC e 10V VIN(0) e 0V
TA e 25 C VOUT e 0V
b8 0
mA
ISINK
Output Sink Current
VCC e 5V VIN(1) e 5V
TA e 25 C VOUT e VCC
1 75
mA
ISINK
Output Sink Current
VCC e 10V VIN(1) e 10V
TA e 25 C VOUT e VCC
80
mA
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation
2









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74C173 Даташит, Описание, Даташиты
AC Electrical Characteristics TA e 25 C CL e 50 pF unless otherwise noted
Symbol
Parameter
Conditions
Min Typ Max Units
tpd0 tpd1
Propagation Delay Time to a Logical ‘‘0’’
or Logical ‘‘1’’ from Clock to Output
VCC e 5V
VCC e 10V
220 400
80 200
ns
ns
tS Input Data Set-up Time
VCC e 5V
VCC e 10V
40 80
15 30
ns
ns
tH Input Data Hold Time
VCC e 5V
VCC e 10V
0 0 ns
0 0 ns
tS Input Disable Set-up Time tS DISS
VCC e 5V
VCC e 10V
100 200
35 70
ns
ns
tH Input Disable Hold Time tH DISS
VCC e 5V
VCC e 10V
0 0 ns
0 0 ns
t1H t0H
Delay from Output Disable to High Impedance
State (from Logical ‘‘1’’ or Logical ‘‘0’’ Level)
VCC e 5V RL e 10k
VCC e 10V RL e 10k
170 340
70 140
ns
ns
tH1
Delay from Output Disable to Logical ‘‘1’’
VCC e 5V
Level (from High Impedance State)
VCC e 10V
170 340
70 140
ns
ns
tH0
Delay from Output Disable to Logical ‘‘0’’
VCC e 5V
Level (from High Impedance State)
VCC e 10V
170 340
70 140
ns
ns
tpd0 tpd1
Propagation Delay from Clear to Output
VCC e 5V
VCC e 10V
240 490
90 180
ns
ns
fMAX
Maximum Clock Frequency
VCC e 5V
VCC e 10V
34
7 0 12
MHz
MHz
tW Minimum Clear Pulse Width
VCC e 5V
VCC e 10V
150 ns
70 ns
tr tf Maximum Clock Rise and Fall Time
VCC e 5V
VCC e 10V
10
5
ms
ms
CIN Input Capacitance
(Note 2)
5 pF
CPD Power Dissipation Capacitance
(Note 3)
AC Parameters are guaranteed by DC correlated testing
Note 1 ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guarantee d Except for ‘‘Operating Temperature Range’’
they are not meant to imply that the devices should be operated at these limits The table of ‘‘Electrical Characteristics’’ provides conditions for actual device
operation
Note 2 Capacitance is guaranteed by periodic testing
Note 3 CPD determines the no load AC power consumption of any CMOS device For complete explanation see 54C 74C Family Characteristics application note
AN-90
Switching Time Waveforms
TL F 5898 – 3
3










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Номер в каталогеОписаниеПроизводители
74C173TRI-STATE Quad D Flip-FlopNational Semiconductor
National Semiconductor

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