DataSheet26.com

H5TC4G83MFR-xxA PDF даташит

Спецификация H5TC4G83MFR-xxA изготовлена ​​​​«Hynix Semiconductor» и имеет функцию, называемую «4Gb DDR3L SDRAM».

Детали детали

Номер произв H5TC4G83MFR-xxA
Описание 4Gb DDR3L SDRAM
Производители Hynix Semiconductor
логотип Hynix Semiconductor логотип 

30 Pages
scroll

No Preview Available !

H5TC4G83MFR-xxA Даташит, Описание, Даташиты
4Gb DDR3L SDRAM
4Gb DDR3L SDRAM
Lead-Free&Halogen-Free
(RoHS Compliant)
H5TC4G43MFR-xxA
H5TC4G83MFR-xxA
H5TC4G63MFR-xxA
* SK hyix Semiconductor reserves the right to change products or specifications without
Rev. 1.0 / Nov. 2012
1
Free Datasheet http://www.datasheet4u.com/









No Preview Available !

H5TC4G83MFR-xxA Даташит, Описание, Даташиты
Revision History
Revision No.
0.1
0.2
0.3
0.4
0.5
1.0
History
Initial Release
Ballout typo correction
Package Dimension correction
Added IDD Specification
Added IDD Specification(x16)
Latest JEDEC Spec Updated
Draft Date
Apr. 2011
May. 2011
Jun. 2011
Aug. 2011
Nov. 2011
Nov. 2012
Remark
Rev. 1.0 / Nov. 2012
2
Free Datasheet http://www.datasheet4u.com/









No Preview Available !

H5TC4G83MFR-xxA Даташит, Описание, Даташиты
Description
The H5TC4G43MFR-xxA, H5TC4G83MFR-xxA and H5TC4G63MFR-xxA are a 4Gb low power Double Data
Rate III (DDR3L) Synchronous DRAM, ideally suited for the main memory applications which requires large
memory density, high bandwidth and low power operation at 1.35V. DDR3L SDRAM provides backward
compatibility with the 1.5V DDR3 based environment without any changes. (Please refer to the SPD infor-
mation for details.)
SK hynix 4Gb DDR3L SDRAMs offer fully synchronous operations referenced to both rising and falling
edges of the clock. While all addresses and control inputs are latched on the rising edges of the clock (fall-
ing edges of the clock), data, data strobes and write data masks inputs are sampled on both rising and
falling edges of it. The data paths are internally pipelined and 8-bit prefetched to achieve very high band-
width.
Device Features and Ordering Information
FEATURES
• VDD=VDDQ=1.35V + 0.100 / - 0.067V
• Fully differential clock inputs (CK, CK) operation
• Differential Data Strobe (DQS, DQS)
• Average Refresh Cycle (Tcase of0 oC~95oC)
- 7.8 µs at 0oC ~ 85 oC
- 3.9 µs at 85oC ~ 95 oC
• On chip DLL align DQ, DQS and DQS transition with CK • JEDEC standard 78ball FBGA(x4/x8), 96ball FBGA
transition
(x16)
• DM masks write data-in at the both rising and falling
edges of the data strobe
• All addresses and control inputs except data,
data strobes and data masks latched on the
rising edges of the clock
• Programmable CAS latency 6, 7, 8, 9, 10 and 11, 13
supported
• Driver strength selected by EMRS
• Dynamic On Die Termination supported
• Asynchronous RESET pin supported
• ZQ calibration supported
• TDQS (Termination Data Strobe) supported (x8 only)
• Write Levelization supported
• Programmable additive latency 0, CL-1, and CL-2
• 8 bit pre-fetch
supported
• This product in compliance with the RoHS directive.
• Programmable CAS Write latency (CWL) = 5, 6, 7, 8, 9
Programmable burst length 4/8 with both nibble
sequential and interleave mode
• BL switch on the fly
• 8banks
Rev. 1.0 / Nov. 2012
3
Free Datasheet http://www.datasheet4u.com/










Скачать PDF:

[ H5TC4G83MFR-xxA.PDF Даташит ]

Номер в каталогеОписаниеПроизводители
H5TC4G83MFR-xxA4Gb DDR3L SDRAMHynix Semiconductor
Hynix Semiconductor

Номер в каталоге Описание Производители
TL431

100 мА, регулируемый прецизионный шунтирующий регулятор

Unisonic Technologies
Unisonic Technologies
IRF840

8 А, 500 В, N-канальный МОП-транзистор

Vishay
Vishay
LM317

Линейный стабилизатор напряжения, 1,5 А

STMicroelectronics
STMicroelectronics

DataSheet26.com    |    2020    |

  Контакты    |    Поиск