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PDF HMT451S6MMP8C Data sheet ( Hoja de datos )
| Número de pieza | HMT451S6MMP8C | |
| Descripción | DDR3 SDRAM | |
| Fabricantes | Hynix Semiconductor | |
| Logotipo |  |
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204pin DDR3 SDRAM SODIMM
DDR3 SDRAM
Unbuffered SODIMM
Based on 2Gb M version
HMT451S6MMP(R)8C
** Contents are subject to change without prior notice.
Rev. 0.2 / Apr. 2009
1
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1 page  
1.2 Speed Grade & Key Parameters
MT/S
Grade
tCK (min)
CAS Latency
tRCD (min)
tRP (min)
tRAS (min)
tRC (min)
CL-tRCD-tRP
DDR3-800
-S6
2.5
6
15
15
37.5
52.5
6-6-6
1.3 Address Table
Organization
Refresh Method
Row Address
Column Address
Bank Address
Page Size
# of Rank
# of Device
Rev. 0.2 / Apr. 2009
HMT451S6MMP(R)8C
DDR3-1066
-G7
1.875
7
13.125
13.125
37.5
50.625
7-7-7
Unit
ns
tCK
ns
ns
ns
ns
tCK
4GB
512M x 64
8K/64ms
A0-A14
A0-A9
BA0-BA2
1KB
2
16
5
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5 Page 
HMT451S6MMP(R)8C
4. ABSOLUTE MAXIMUM RATINGS
4.1 Absolute Maximum DC Ratings
Symbol
Parameter
Rating
Units Notes
VDD Voltage on VDD pin relative to Vss
- 0.4 V ~ 1.975 V
V ,3
VDDQ
Voltage on VDDQ pin relative to Vss
- 0.4 V ~ 1.975 V
V ,3
VIN, VOUT Voltage on any pin relative to Vss
- 0.4 V ~ 1.975 V
V
TSTG
Storage Temperature
-55 to +100
,2
1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
2. Storage Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement
conditions, please refer to JESD51-2 standard.
3. VDD and VDDQ must be within 300mV of each other at all times; and VREF must be not greater than
0.6XVDDQ,When VDD and VDDQ are less than 500mV; VREF may be equal to or less than 300mV.
4.2 DRAM Component Operating Temperature Range
Symbol
Parameter
Rating
Units Notes
TOPER
Normal Temperature Range
Extended Temperature Range
0 to 85
85 to 95
,2
1,3
1. Operating Temperature TOPER is the case surface temperature on the center / top side of the DRAM.
For measurement conditions, please refer to the JEDEC document JESD51-2.
2. The Normal Temperature Range specifies the temperatures where all DRAM specifications will be supported.
During operation, the DRAM case temperature must be maintained between 0 - 85oC under all operating
conditions
3. Some applications require operation of the DRAM in the Extended Temperature Range between 85°… and
95°… case temperature.
Full specifications are guaranteed in this range, but the following additional conditions apply:
a) Refresh commands must be doubled in frequency, therefore reducing the Refresh interval tREFI to 3.9 µs.
(This double refresh requirement may not apply for some devices.) It is also possible to specify a component
with 1X refresh (tREFI to 7.8µs) in the Extended Temperature Range. Please refer to supplier data sheet and/
or the DIMM SPD for option avail ability.
b) If Self-Refresh operation is required in the Extended Temperature Range, than it is mandatory to either use the
Manual Self-Refresh mode with Extended Temperature Range capability (MR2 A6 = 0band MR2 A7 = 1b) or
enable the optional Auto Self-Refresh mode (MR2 A6 = 1b and MR2 A7 = 0b).
Rev. 0.2 / Apr. 2009
11
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