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PDF HMT82GV7AMR8C Data sheet ( Hoja de datos )

Número de pieza HMT82GV7AMR8C
Descripción DDR3 SDRAM VLP
Fabricantes Hynix Semiconductor 
Logotipo Hynix Semiconductor Logotipo



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No Preview Available ! HMT82GV7AMR8C Hoja de datos, Descripción, Manual

240pin DDR3 SDRAM VLP Registered DIMM
DDR3 SDRAM VLP
Registered DIMM
Based on 4Gb A-die
HMT451V7AFR8C
HMT41GV7AFR4C
HMT41GV7AFR8C
HMT82GV7AMR4C
HMT82GV7AMR8C
*SK hynix reserves the right to change products or specifications without notice.
Rev. 1.0 / May. 2013
1
Free Datasheet http://www.datasheet4u.com/

1 page




HMT82GV7AMR8C pdf
Pin Descriptions
Pin Name
CK0
CK0
CK1
CK1
CKE[1:0]
RAS
CAS
WE
S[3:0]
A[9:0],A11,
A[15:13]
A10/AP
A12/BC
BA[2:0]
SCL
SDA
SA[2:0]
Par_In
Err_Out
Description
Clock Input, positive line
Clock Input, negative line
Clock Input, positive line
Clock Input, negative line
Clock Enables
Row Address Strobe
Num
ber
1
1
1
1
2
1
Column Address Strobe
1
Write Enable
1
Chip Selects
4
Address Inputs
Address Input/Autoprecharge
Address Input/Burst chop
SDRAM Bank Addresses
Serial Presence Detect (SPD)
Clock Input
SPD Data Input/Output
SPD Address Inputs
Parity bit for the Address and
Control bus
Parity error found on the
Address and Control bus
14
1
1
3
1
1
3
1
1
Pin Name
Description
ODT[1:0]
DQ[63:0]
CB[7:0]
DQS[8:0]
DQS[8:0]
DM[8:0]/
DQS[17:9],
TDQS[17:9]
DQS[17:9],
TDQS[17:9]
EVENT
TEST
On Die Termination Inputs
Data Input/Output
Data check bits Input/Output
Data strobes
Data strobes, negative line
Data Masks / Data strobes,
Termination data strobes
Data strobes, negative line,
Termination data strobes
Reserved for optional hardware
temperature sensing
Memory bus test tool (Not Con-
nected and Not Usable on DIMMs)
RESET
Register and SDRAM control pin
VDD
VSS
VREFDQ
VREFCA
VTT
VDDSPD
Power Supply
Ground
Reference Voltage for DQ
Reference Voltage for CA
Termination Voltage
SPD Power
Num
ber
2
64
8
9
9
9
9
1
1
1
22
59
1
1
4
1
Rev. 1.0 / May. 2013
5
Free Datasheet http://www.datasheet4u.com/

5 Page





HMT82GV7AMR8C arduino
On DIMM Thermal Sensor
The DDR3 SDRAM DIMM temperature is monitored by integrated thermal sensor. The integrated thermal
sensor comply with JEDEC “TSE2002av, Serial Presence Detect with Temperature Sensor”.
Connection of Thermal Sensor
EVENT
SCL
SDA
SA0
SA1
SA2
EVENT SPD with
SCL Integrated
SDA TS
SA0
SA1
SA2
Temperature-to-Digital Conversion Performance
Parameter
Temperature Sensor Accuracy (Grade B)
Resolution
Condition
Active Range,
75°C < TA < 95°C
Monitor Range,
40°C < TA < 125°C
-20°C < TA < 125°C
Min Typ Max Unit
- ± 0.5 ± 1.0 °C
- ± 1.0 ± 2.0 °C
- ± 2.0 ± 3.0 °C
0.25
°C
Rev. 1.0 / May. 2013
11
Free Datasheet http://www.datasheet4u.com/

11 Page







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