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82806AA PDF даташит

Спецификация 82806AA изготовлена ​​​​«Intel» и имеет функцию, называемую «PCI 64 Hub».

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Номер произв 82806AA
Описание PCI 64 Hub
Производители Intel
логотип Intel логотип 

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82806AA Даташит, Описание, Даташиты
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Intel® 82806AA PCI 64 Hub (P64H)
Datasheet
March 2001
Document Number: 298025-002
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82806AA Даташит, Описание, Даташиты
Intel® 82806AA PCI 64 Hub (P64H)
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Information in this document is provided in connection with Intel® products. No license, express or implied, by estoppel or otherwise, to any intellectual
property rights is granted by this document. Except as provided in Intel’s Terms and Conditions of Sale for such products, Intel assumes no liability
whatsoever, and Intel disclaims any express or implied warranty, relating to sale and/or use of Intel products including liability or warranties relating to fitness
for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Intel products are not intended for use in
medical, life saving, or life sustaining applications.
Intel may make changes to specifications and product descriptions at any time, without notice.
Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future
definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.
The Intel® 82806AA PCI 64 Hub (P64H) may contain design defects or errors known as errata which may cause the product to deviate from published
specifications. Current characterized errata are available on request.
Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.
I2C is a 2-wire communications bus/protocol developed by Philips. SMBus is a subset of the I2C bus/protocol and was developed by Intel. Implementations of
the I2C bus/protocol may require licenses from various entities, including Philips Electronics N.V. and North American Philips Corporation.
Alert on LAN is a result of the Intel-IBM Advanced Manageability Alliance and a trademark of IBM
Copies of documents which have an ordering number and are referenced in this document, or other Intel literature, may be obtained from:
Intel Corporation
www.intel.com
or call 1-800-548-4725
Intel, Pentium III and Pentium 4 are trademarks or registered trademark sof Intel Corporation or its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others.
Copyright © Intel Corporation 2000, 2001
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82806AA Даташит, Описание, Даташиты
Intel® 82806AA PCI 64 Hub (P64H)
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Contents
1. Signal Description ...................................................................................................................... 11
1.1. Hub Interface to the Host Controller.............................................................................. 11
1.2. PCI Interface ................................................................................................................. 12
1.3. Interrupt Interface .......................................................................................................... 14
1.4. Clocks............................................................................................................................ 15
1.5. Miscellaneous................................................................................................................ 15
1.6. Power and Ground Signals............................................................................................ 15
2. Register Description................................................................................................................... 17
2.1. Register Nomenclature and Access Attributes.............................................................. 17
2.2. Hub Interface to PCI Bridge Registers (D31:F0) ........................................................... 18
2.2.1. VID—Vendor ID Register (D31:F0) .................................................................. 19
2.2.2. DID—Device ID (D31:F0) ................................................................................. 19
2.2.3. CMD—Device Command (D31:F0) .................................................................. 20
2.2.4. PD_STS—Primary Device Status Register (D31:F0) ....................................... 21
2.2.5. REVID—Revision ID (D31:F0).......................................................................... 22
2.2.6. PIF – Programming Interface ........................................................................... 22
2.2.7. SCC—Sub-Class Code Register (D31:F0)....................................................... 22
2.2.8. BCC—Base-Class Code Register (D31:F0) ..................................................... 22
2.2.9. CLS—Cache Line Size Register (D31:F0) ....................................................... 23
2.2.10. PMLT—Primary Master Latency Timer (D31:F0) ............................................. 23
2.2.11. HEADTYP—Header Type Register (D31:F0)................................................... 23
2.2.12. PBUS_NUM—Primary Bus Number Register (D31:F0) ................................... 23
2.2.13. SBUS_NUM—Secondary Bus Number Register (D31:F0) .............................. 24
2.2.14. SUB_BUS_NUM—Subordinate Bus Number Register (D31:F0) ..................... 24
2.2.15. SMLT—Secondary Master Latency Timer (D31:F0) ........................................ 24
2.2.16. IOBASE—I/O Base Register (D31:F0) ............................................................. 25
2.2.17. IOLIM—I/O Limit Register (D31:F0) ................................................................. 25
2.2.18. SECSTS—Secondary Status Register (D31:F0).............................................. 26
2.2.19. MEMBASE—Non-Prefetchable Memory Base Address Register (D31:F0) ..... 27
2.2.20. MEMLIM—Non-Prefetchable Memory Limit Address Register (D31:F0) ......... 27
2.2.21. PREF_MEM_BASE—Prefetchable Memory Base Address Register (D31:F0) 28
2.2.22. PREF_MEM_LIM—Prefetchable Memory Limit Address Register (D31:F0) ... 28
2.2.23. PREF_MEM_BASE_UPPER—Prefetchable Memory Base Upper 32-Bit
Address Register (D31:F0)......................................................................................... 29
2.2.24. PREF_MEM_LIM_UPPER—Prefetchable Memory Base Upper 32-Bit
Address Register (D31:F0)......................................................................................... 29
2.2.25. IOBASE_HI—I/O Base Upper 16-Bit Address Register (D31:F0) .................... 29
2.2.26. IOBASE_LO—I/O Limit Upper 16-Bit Address Register (D31:F0) ................... 30
2.2.27. INT_LINE—Interrupt Line Register (D31:F0) ................................................... 30
2.2.28. BRIDGE_CNT—Bridge Control Register (D31:F0) .......................................... 30
2.2.29. CNF—P64H Configuration Register (D31:F0).................................................. 32
2.2.30. Multi-Transaction Timer (MTT) Register (D31:F0) ........................................... 33
2.2.31. Soft_DT_Timer—Soft Delayed Transaction Timer Register (D31:F0) ............. 33
2.2.32. ERR_CMD—Error Command Register (D31:F0) ............................................. 34
2.2.33. ERR_STS—Error Status Register (D31:F0)..................................................... 34
2.3. Advanced Interrupt Controller (APIC) Registers (D0:F0) .............................................. 35
2.3.1. VID—Vendor ID Register (D0:F0) .................................................................... 35
2.3.2. DID—Device ID Register (D0:F0)..................................................................... 36
2.3.3. CMD—Command Register (D0:F0).................................................................. 36
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