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PDF NLSX3373 Data sheet ( Hoja de datos )
| Número de pieza | NLSX3373 | |
| Descripción | Translator | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NLSX3373
2-Bit 20 Mb/s Dual-Supply
Level Translator
The NLSX3373 is a 2−bit configurable dual−supply bidirectional
auto sensing translator that does not require a directional control pin.
The VCC I/O and VL I/O ports are designed to track two different
power supply rails, VCC and VL respectively. The VCC supply rail is
configurable from 1.65 V to 4.5 V while VL supply rail is
configurable to 1.2 V to 4.1 V. This allows lower voltage logic
signals on the VL side to be translated into higher voltage logic
signals on the VCC side, and vice−versa.
The NLSX3373 translator has open−drain outputs with integrated
10 kW pullup resistors on the I/O lines. The integrated pullup
resistors are used to pullup the I/O lines to either VL or VCC. The
NLSX3373 is an excellent match for open−drain applications such as
the I2C communication bus.
Features
• Wide High−Side VCC Operating Range: 1.65 V to 4.5 V
Wide Low−Side VL Operating Range: 1.2 V to 4.1 V
• High−Speed with 20 Mb/s Guaranteed Date Rate for VL > 2.5 V
• Low Bit−to−Bit Skew
• Enable Input and I/O Lines have Overvoltage Tolerant (OVT) to
4.5 V
• Nonpreferential Powerup Sequencing
• Integrated 10 kW Pullup Resistors
• Small Space Saving Package − 1.8 x 1.2 x 0.5 mm UDFN8
• This is a Pb−Free Device
Typical Applications
• I2C, SMBus, PMBus
• Low Voltage ASIC Level Translation
• Mobile Phones, PDAs, Cameras
Important Information
• ESD Protection for Power, Enable and I/O Pins:
Human Body Model (HBM): $7.5 kV
Machine Model (MM): 400 V
© Semiconductor Components Industries, LLC, 2008
July, 2008 − Rev. 5
1
http://onsemi.com
MARKING
DIAGRAM
8
1
UDFN8
MU SUFFIX
CASE 517AJ
VBM
G
VB = Specific Device Code
M = Date Code
G = Pb−Free Package
LOGIC DIAGRAM
EN VL VCC GND
I/O VL1
I/O VCC1
I/O VL2
I/O VCC2
PIN ASSIGNMENT
VL 1
I/O VL1 2
I/O VL2 3
GND 4
8 VCC
7 I/O VCC1
6 I/O VCC2
5 EN
(Top View)
ORDERING INFORMATION
Device
Package
Shipping†
NLSX3373MUTAG UDFN8 3000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Publication Order Number:
NLSX3373/D
Free Datasheet http://www.datasheet4u.com/
1 page  
NLSX3373
TIMING CHARACTERISTICS − RAIL−TO−RAIL DRIVING CONFIGURATIONS
(I/O test circuit of Figures 2 and 3, CLOAD = 15 pF, driver output impedance v 50 W, RLOAD = 1 MW)
−405C to +855C
(Notes 3 and 4)
Symbol
Parameter
+1.2 v VL v VCC v +4.5 V
tRVCC I/O VCC Risetime
tFVCC I/O VCC Falltime
tRVL I/O VL Risetime
tFVL I/O VL Falltime
tPDVL−VCC Propagation Delay (Driving I/O VL)
tPDVCC−VL Propagation Delay (Driving I/O VCC)
tPPSKEW Part−to−Part Skew
Maximum Data Rate
Test Conditions
Min Typ Max
25
37
30
30
30
30
20
8
+1.2 v VL v VCC v +3.3 V
tRVCC I/O VCC Risetime
tFVCC I/O VCC Falltime
tRVL I/O VL Risetime
tFVL I/O VL Falltime
tPDVL−VCC Propagation Delay (Driving I/O VL)
tPDVCC−VL Propagation Delay (Driving I/O VCC)
tPPSKEW Part−to−Part Skew
Maximum Data Rate
25
30
30
30
20
20
10
10
+1.8 v VL v VCC v +2.5 V
tRVCC I/O VCC Risetime
tFVCC I/O VCC Falltime
tRVL I/O VL Risetime
tFVL I/O VL Falltime
tPDVL−VCC Propagation Delay (Driving I/O VL)
tPDVCC−VL Propagation Delay (Driving I/O VCC)
tPPSKEW Part−to−Part Skew
Maximum Data Rate
15
15
15
15
15
15
10
16
+2.5 v VL v VCC v +3.3 V
tRVCC I/O VCC Risetime
tFVCC I/O VCC Falltime
tRVL I/O VL Risetime
tFVL I/O VL Falltime
tPDVL−VCC Propagation Delay (Driving I/O VL)
tPDVCC−VL Propagation Delay (Driving I/O VCC)
tPPSKEW Part−to−Part Skew
Maximum Data Rate
20
3. Typical values are for VCC = +3.3 V, VL = +1.8 V and TA = +25°C.
4. All units are production tested at TA = +25°C. Limits over the operating temperature range are guaranteed by design.
15
15
15
15
15
15
10
Unit
ns
ns
ns
ns
ns
ns
nS
Mb/s
ns
ns
ns
ns
ns
ns
nS
Mb/s
ns
ns
ns
ns
ns
ns
nS
Mb/s
ns
ns
ns
ns
ns
ns
nS
Mb/s
http://onsemi.com
5
Free Datasheet http://www.datasheet4u.com/
5 Page | ||
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| PDF Descargar | [ Datasheet NLSX3373.PDF ] | |
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