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HIP0045 PDF даташит

Спецификация HIP0045 изготовлена ​​​​«Intersil Corporation» и имеет функцию, называемую «1A/50V Octal Low Side Power Driver With Serial Bus Control and Fault Protection».

Детали детали

Номер произв HIP0045
Описание 1A/50V Octal Low Side Power Driver With Serial Bus Control and Fault Protection
Производители Intersil Corporation
логотип Intersil Corporation логотип 

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HIP0045 Даташит, Описание, Даташиты
Data Sheet
HIP0045
April 1999 File Number 4047.2
1A/50V Octal Low Side Power Driver With
Serial Bus Control and Fault Protection
The HIP0045 is a logic controlled, eight channel Octal Serial
Power Low Side Driver. The serial peripheral interface (SPI)
utilized by the HIP0045 is a serial synchronous bus compatible
with Intersil CDP68HC05, or equivalent, microcomputers. As
shown in the Block Diagram for the HIP0045, each of the open
drain MOS Output Drivers have individual protection for over-
voltage and over-current. Each output channel has separate
output latch control with fault unlatch and diagnostic or status
feedback. Under normal ON conditions, each output driver is in
a low voltage, high current state of saturated turn-on.
Comparators in the diagnostic circuitry monitor the output
drivers to determine if an out of saturation condition exists. If a
fault is sensed, the respective output driver for Channels 0 - 5
have overcurrent latch-off. Channels 6 and 7 are configured for
lamp drivers and have current limiting with over-temperature
latch-off. Channels 0 and 1 have direct parallel drive control for
PWM applications and are ORed with the SPI Bus control. All
channels are SPI Bus controlled and sense the output states
for diagnostic feedback.
The HIP0045 is fabricated in a Power BiMOS IC process,
and is intended for use in automotive and other applications
having a wide range of temperature and electrical stress
conditions. It is particularly suited for driving relays,
solenoids and lamps in applications where low standby
power, high operating voltage, and high output current in
high ambient temperature conditions is required.
The HIP0045 is in a 20 lead plastic Power SOP (PSOP)
Package with an integral copper ‘slug’ to conduct heat directly
to a PCB interface or heat sink on the bottom of the package.
Ordering Information
PART NO. TEMP. RANGE (oC) PACKAGE
HIP0045AB
-40 to 125
20 Ld PSOP
PKG. NO.
M20.433
Driver Block Diagram
OUT
SPI AND
DIRECT
INPUT
CONTROL
WITH
FAULT/
STATUS
OUTPUT
DRIVER
OC LATCH
(CH. 0-5)
OC LIMIT
(CH. 6, 7)
-
+
ISK
VCC
OVER-TEMP.
DET. (CH. 6, 7)
OC
REF
+
-
VREF
RESET
FAULT/STATUS
Features
• Octal NDMOS Output Drivers in a High Voltage Power
BiMOS Process
• Over-Stress Protection - Each Output:
- Over-Current Protection . . . . . . . . . . . . . . . . . . . 1A Min
- Over-Voltage Clamp Protection . . . . . . . . . . . . 50V Typ
- Thermal Shutdown Protection (2 Channels)
• Open-Load Detection
• Power BiMOS Output Configuration
- Current Latch-Off Protection for 6 Channels; 2 with
External Drive Input and ORed with SPI Bus Control
- 2 Channels Configured for Lamp Drivers with Current
Limiting and Over-Temperature Latch-Off
• High Speed CMOS Logic Control
- SPI Bus Controlled Interface
- Individual Output Latch
- Individual Fault Unlatch and Feedback
- Common Reset Line
• Low Quiescent Current . . . . . . . . . . . . . . . . . . . 5mA Max
• Ambient Operating Temp. Range . . . . . . . -40oC to 125oC
Applications
• Automotive and Industrial Systems
• Solenoids, Relays and Lamp Drivers
• Logic and µP Controlled Drivers
• Robotic Controls
Pinout
HIP0045 (PSOP WITH HEAT SLUG)
TOP VIEW
INTEGRAL COPPER
HEAT SINK ‘SLUG’
FOR PCB CONTACT
OR EXT. HEAT SINK
GND
IN0
MISO
OUT0
OUT2
OUT4
OUT6
MOSI
SCK
GND
1
2
3
4
5
6
7
8
9
10
20 GND
19 CE
18 RESET
17 OUT7
16 OUT5
15 OUT3
14 OUT1
13 VCC
12 IN1
11 GND
4-1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999









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HIP0045 Даташит, Описание, Даташиты
Detailed Block Diagram
HIP0045
VCC
IN 0, 1
Q0, 1
ON/OFF
LATCH
FILTER
FAULT LATCH
SQ
R DIAG 0, 1
STATUS/
FAULT
OVERLOAD LATCH
SQ
R
RESET
DRIVER
-
+
OC
REF
ISK OUT0, 1
VCC
+ VREF
-
VCC
CE
MISO
RESET
QD
SCK
VCC
FILTER
Q0-7
OUT
8-BIT
OUTPUT
LATCH
Q2 - 5
ON/OFF
LATCH
OVERLOAD LATCH
SQ
R
MOSI
VCC
VCC
RESET
LOW
VOTAGE
RESET
SPI
SHIFT
REG
IN
DIAG 0-7
RESET
NOTES:
1. OC = Over-Current Voltage Ref. = 1.8V Typ.
2. ISK = Current Sink Pull-Down = 500µA Typ.
3. Diag0, 1 = Status bit when Q0, 1 controlling OUT0, 1.
4. Diag0, 1 = Fault bit when IN1, 0 controlling OUT0, 1.
5. Refer to text and Tables 6, 7 for diagnostic information.
Q6, 7
ON/OFF
LATCH
OVERLOAD LATCH
SQ
R
OVER-TEMP.
DET.
DRIVER
ISK OUT2-5
-
+
OC
REF
DIAG 2 - 5
+
-
STATUS
VCC
VREF
DRIVER
ISK OUT6, 7
-
+
OC
REF
DIAG6, 7
+
-
STATUS
VCC
VREF
Input to Output Control Tables
TABLE 1. OUTPUT 0
SPI BIT 0
IN0
01
00
10
11
SPI BIT 1
0
0
1
1
TABLE 2. OUTPUT 1
IN1
1
0
0
1
OUT0
OFF
ON
ON
ON
OUT1
OFF
ON
ON
ON
TABLE 3. OUTPUT 2 - 7
SPI BIT 2 - 7
OUT2 - 7
0 OFF
1 ON
TABLE 4. OUTPUT CONTROL REGISTER, Q0 - 7
Q1 Q3 Q5 Q7 Q0 Q2 Q4 Q6
(D7I) (D6I) (D5I) (D4I) (D3I) (D2I) (D1I) (D0I)
MSB
LSB
NOTE: The Output Control Register bits Q0 -7 have the same order
as the Diagnostic Failure Register bits Diag0 - 7 as defined in Table 5.
Data bits D0I - D7I give the MOSI SPI serial data input flow
sequence.
4-2









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HIP0045 Даташит, Описание, Даташиты
HIP0045
Absolute Maximum Ratings
Maximum Output Voltage, VOUT . . . . . . . . . . . . . . . . . . .-0.7 to VOC
Peak Output Load Current, ILOAD . . . . . As Specified for ISC, ILIM
Continuous Output Load Current, IOUT (All 8 Outputs ON) . . . . 0.5A
Continuous Output Load Current, IOUT (Any one Output ON) . . 1A
Total Average Current, IOUT (All 8 Outputs) . . . . . . . . . . . . . . . 4.5A
Reverse Peak Current Drive, Any one Output, IRD; t 2ms . . . -3A
DC Logic Supply, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to 7V
Input Voltage, All Inputs and Data Lines . . . . . . . -0.3 to VCC +0.3V
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 125oC
Logic Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . 4.5V to 5.5V
Thermal Information
Thermal Resistance (Typical, Note 6)
θJA (oC/W) θJC (oC/W)
PSOP Package . . . . . . . . . . . . . . . . . .
40
2
Maximum Junction Temperature, TJ . . . . . . . . . . . . . . . . . . . .150oC
Maximum
Maximum
Storage Temperature Range,
Lead Temperature (Soldering
TSTG
10s) .
.
.
.
.
.
.
.
.
-55oC to 150oC
. . . . . . . .265oC
Die Characteristics
Back Side Potential . . . . . . . . . . . . . . . . . . .V- (GND Pin, Heat Sink)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
6. θJA Rated with standard PC Board, θJC rated with infinite heat sink.
Electrical Specifications VCC = 4.5V to 5.5V, TA = -40oC to 125oC, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
Standby Current, No Load
Supply Current, Full Load
Output Clamping Voltage (Note 7)
Output Clamping Energy
ICCO
ICC
VOC
EOC
No Load
All Outputs ON, 0.5A Load Per Output
ILOAD = 0.5A, Output Programmed OFF
1ms Single Pulse Width, TA = 25oC,
(Refer to Figure 4 for SOA)
- - 5 mA
- - 5 mA
45 - 62 V
20 45 - mJ
Output Leakage Current 1 (Note 8)
Output Leakage Current 2 (Note 8)
Output Leakage Current 3 (Note 8)
Drain-to-Source On Resistance, OUT0 - 7
Output Capacitance
Turn-On Delay, OUT0, 1
Turn-On Delay, OUT2 - 7
Turn-Off Delay
Turn-On Voltage Slew-Rate, OUT2 - 7
Turn-On Voltage Slew-Rate, OUT0, 1
Turn-Off Voltage Slew-Rate, OUT0 - 7
Turn-Off Voltage Slew-Rate, OUT0 - 7
FAULT PARAMETERS
IO LEAK1 VOUT = 25V, Outputs OFF
IO LEAK2 VOUT = 16V, Outputs OFF
IO LEAK3 VOUT = 16V, Outputs OFF, VCC = 1V
rDSON ILOAD = 0.5A; TJ = 150oC
COUT VOUT = 16V, f = 1MHz
td(ON)
RL = 500, VCE = 50% to VOUT = 0.9 x VBATT,
VIN0,1 = 50% to VOUT = 0.9 x VBATT,
VBATT = 16V
td(ON)
RL = 500, VCE = 50% to VOUT = 0.9 x VBATT,
VBATT = 16V
td(OFF)
RL = 500, VCE = 50% to VOUT = 0.1 x VBATT,
VIN0,1 = 50% to VOUT = 0.9 x VBATT,
VBATT = 16V
-d---V----d-O--t--N----1--
For VOUT = 90% to 30% of VBATT; VBATT = 16V,
RL = 500
d----V----d-O--t--N----2--
-d---V-----O----F----F---1--
dt
For VOUT = 90% to 30% of VBATT; VBATT = 16V,
RL = 500
For VOUT = 30% to 90% of VBATT; VBATT = 16V,
RL = 500
d----V-----Od----tF----F---2--
For VOUT = 30% to 80% of VOC;
VBATT = 0.9 x VOC, RL = 500
-
-
-
-
-
-
-
-
-
-
-
-
- 100 µA
- 100 µA
- 10 µA
- 1.5
- 20 pF
- 5 µs
- 10 µs
- 10 µs
0.7 3.5 V/µs
2 10 V/µs
2 10 V/µs
2 15 V/µs
Reverse Current Drive, OUT0 - 7
Reverse Voltage Drop, OUT0 - 7
ICC during Reverse Current Drive
IRD
VRD
ICC
IOUT = -3A, t 2ms
IOUT = -3A, t 2ms
-500
-
- mA
-1.5 -
-V
- - 100 mA
4-3










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Номер в каталогеОписаниеПроизводители
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