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HIP0060 PDF даташит

Спецификация HIP0060 изготовлена ​​​​«Intersil Corporation» и имеет функцию, называемую «1.5A/ 50V Quad Low Side Power Driver with Serial Bus Control and Fault Protection».

Детали детали

Номер произв HIP0060
Описание 1.5A/ 50V Quad Low Side Power Driver with Serial Bus Control and Fault Protection
Производители Intersil Corporation
логотип Intersil Corporation логотип 

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HIP0060 Даташит, Описание, Даташиты
HIP0060
July 1997
1.5A, 50V Quad Low Side Power Driver
with Serial Bus Control and Fault Protection
Features
Description
• Quad NDMOS Output Drivers in a High Voltage Power
BiMOS Process
• Over-Stress Protection - Each Output
- Over-Current Limiting . . . . . . . . . . . . . . . . . .1.5A Min
- Internal Zener Drain-to-Gate Over-Voltage Clamp
Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50V Typ
- Thermal Shutdown Protection
- Open-Load Detection
• Low Quiescent Current . . . . . . . . . . . . . . . . 10mA Max
• Serial Diagnostic Link with SPI Bus
• Diagnostic Interrupt Fault Flag
• 5V CMOS Logic Input Control
• Common Reset for Fault Bits and Output Drivers
• Ambient Operating
Temperature Range. . . . . . . . . . . . . . . . -40oC to 125oC
Applications
• Automotive and Industrial Systems
• Fuel Injection Drivers
• Solenoids, Relays and Lamp Drivers
• Logic and µP Controlled Drivers
• Robotic Controls
The HIP0060 is a 5V logic controlled Quad Low Side Power
Driver. The outputs are individually protected for over-current
(OC), over-temperature (OT) and over-voltage (OV). If an OC
short circuit in the output load is sensed (IS) in one output
power driver, that output current will be independently limited
while the other outputs remain in operation. Over-current is
limited by direct gate feedback. Over-voltage protection is pro-
vided by a drain-to-gate zener diode that clamps inductive
switching pulses.
The output drivers are individually controlled through a Gate
Control Latch. Temperature is sensed at each output. If a ther-
mal fault exists, a status flag is set and the output is latched
off. Open-load (OL) and over-temperature (OT) faults sets a
status flag bit as diagnostic output to the SPI bus. For all fault
bits (8), an ORed one-shot interrupt signal is output to the INT
pin. An RST reset clears the fault flags and disables all out-
puts while active. The Serial Peripheral Interface (SPI) bus
pins are the Serial Input (SI), Serial Output (SO), Serial Data
Clock (SCK) and the Chip Select (CS).
The HIP0060 is fabricated in a Power BiMOS IC process, and
is intended for use in automotive and other applications having
a wide range of temperature and electrical stress conditions. It
is particularly suited for driving lamps, relays, and solenoids in
applications where low operating power, high breakdown volt-
age, and higher output current at high temperatures is required.
Ordering Information
PART NUMBER
HIP0060AB
TEMP.
RANGE (oC)
PACKAGE
-40 to 125 24 Ld SOIC
PKG.
NO.
M24.3
Pinout
HIP0060 (SOIC)
TOP VIEW
GND 1
INT 2
INA 3
OUTA 4
GND 5
GND 6
GND 7
GND 8
OUTB 9
INB 10
SI 11
CS 12
24 VDD
23 RST
22 IND
21 OUTD
20 GND
19 GND
18 GND
17 GND
16 OUTC
15 INC
14 SO
13 SCK
Block Diagram
CHANNEL A
(1 OF 4)
VDD
+5V
GATE
CONTROL
INA LATCH
OPEN LOAD
DETECTOR
OVER TEMP.
DETECTOR
RST
SCK
SI
SO
CS
+
O.T.
BIT
O.L.
BIT
OVER
CURRENT
LIMIT
IS
8-BIT SPI
(SERIAL
DIAG.
REG)
TO
B, C, D
2
2
2
2 22
FROM B, C, D
8 ORed O.T./O.L.
FAULT INPUTS,
ONE-SHOT
MULTI OUTPUT
OUTA
INT
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
File Number 4045









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HIP0060 Даташит, Описание, Даташиты
HIP0060
Absolute Maximum Ratings
Max Output Voltage, VOUT (Note 2) . . . . . . . . . . . . . . . . . . . . . VOC
Max Output Load Current, ILOAD (Per Output, Note 3) . . . . . . . . ICL
Logic Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Logic Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . -0.3V to +7V
Operating Conditions
Ambient Temperature Range . . . . . . . . . . . . . . . . . -40oC to 125oC
Junction Temperature Range . . . . . . . . . . . . . . . . -40oC to 150oC
Thermal Information
Thermal Resistance (Typical, Notes 1, 4)
θJA (oC/W)
SOIC - PC Board Mount, Min. Copper . . . . . . . . . .
60
SOIC - PC Board Mount, 2 sq. in. Copper . . . . . . . .
Maximum Storage Temperature Range -55oC to 150oC
35
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
(SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
2. The MOSFET Output Drain is internally clamped with a Drain-to-Gate zener diode that turns on the MOSFET; holding the Drain at the
Output Clamp voltage VOC.
3. The output drive is protected by an internal current limit. The ICL over-current limiting threshold parameter specification defines the max-
imum current. The maximum current with all outputs ON may be further limited by dissipation.
4. Device dissipation is based on thermal resistance capability of the package in a normal operating environment. The junction to ambient
thermal resistance of 60oC/W is defined here as a PC Board mounted device with minimal copper. With approximately 2 square inches
of copper area as a heat sink, it is practical to achieve 35oC/W thermal resistance. Further reduction in the thermal resistance can be
achieved with additional PC Board Copper ground area or an external heat sink structure next to the ground leads at the center of the
package.
Electrical Specifications VDD = 4.5V to 5.5V, VSS = 0V, TA = -40oC to 125oC; Unless Otherwise Specified
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX
OUTPUTS DRIVERS (DR0 TO DR7)
Output Channel Resistance
rDSON IOUT = 0.5A
- - 0.8
Over-Current Limiting Threshold
ICL
1.5 - 3.5
Output Clamping Voltage
Output Clamping Energy
VOC
40 50 60
EOC 1ms Single Pulse Width, TA = 25oC, - 85 -
(Refer to Figure 3 for SOA Limits).
Output OFF Leakage Current
Open-Load Fault Threshold
Output Rise Time
Output Fall Time
Turn-On Delay
Turn-Off Delay
POWER SUPPLY
ILK
ROLD
tR
tF
tON
tOFF
VOUT = 14.5V
VOUT = 14.5V, Output Off
RL = 30Ω, VOUT = 14.5V
RL = 30Ω, VOUT = 14.5V
RL = 30Ω, VOUT = 14.5V
RL = 30Ω, VOUT = 14.5V
- - 180
4 - 200
1 - 12
1 - 12
- - 12
- - 12
UNITS
A
V
mJ
µA
k
µs
µs
µs
µs
Power On Reset Threshold
VDD(POR)
VDD Logic Supply Current
IDD All Outputs ON or OFF
LOGIC INPUTS (INx, SI, SCK, RST, CS)
High Level Input Voltage
Low Level Input Voltage
Input Hysteresis
High Output Voltage, SO, INT
Low Output Voltage, SO
Input Pull-Down Current, INx
Reset Input Pull-Up Current, RST
VIH
VIL
VILHYS
V OL
V OH
IINPD
IRPU
Current Sink = 1.6mA
Current Source = -0.8mA
3.2 - 4.4 V
- - 10 mA
0.7xVDD
-
-
V
- - 0.2xVDD V
0.8 -
-V
- - 0.4 V
VDD - 0.8
75
-
-
-V
250 µA
20 - 120 µA
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HIP0060 Даташит, Описание, Даташиты
HIP0060
Electrical Specifications VDD = 4.5V to 5.5V, VSS = 0V, TA = -40oC to 125oC; Unless Otherwise Specified (Continued)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIAGNOSTIC
Pulse Width, INT
t INT
3 - 25 µs
Fault Response Time
tFAULT
- - 16 µs
OVER-TEMPERATURE PROTECTION
Over-Temperature Shutdown
TSD
160 -
- oC
SERIAL PERIPHERAL INTERFACE TIMING (Capacitance Each Pin, CL = 200pF)
SCK Period
tCYC
500 -
- ns
SCK Clock High/Low Time
tWSCKH,
tWSCKL
200 -
- ns
SCK Rise/Fall Time
trSCK,
tfSCK
- - 30 ns
Enable Lead/Lag Time
tLEAD,
tLAG
250 -
- ns
Output Data Valid Time
tV
- - 170 ns
Data Setup Time
tSU
- - 30 ns
Disable Time
tDIS
- - 250 ns
Description of Diagnostics
OC (Over-Current) Fault Mode
In a short circuit or over-current fault condition when an out-
put is switched on, the output current is limited to the ICL
maximum as defined in the Electrical Specifications. An OC
fault condition does not shutdown the output. The current is
sensed and feedback is directed to the gate of the MOS Out-
put Driver. The gate voltage is reduced to maintained the
specified level of current limiting. In this mode, the drain volt-
age will increase and cause increased dissipation.
OT (Over-Temperature) Fault Mode
Under a high dissipation over-temperature fault condition,
the output temperature is detected and compared to a preset
threshold level. When the OT threshold is exceeded, thermal
shutdown for that output occurs. The Gate Control Latch
drive to the output is switched off and a status flag (the OT
Bit) for the fault is set. The output shutdown action is inde-
pendent of the IN input state. However, the Gate Control
Latch and OL Bit will be reset on the next rising edge of the IN
input and, if the fault still exists, the shutdown action will repeat.
Diagnostic action for an OT fault includes feedback of the
fault status to the Serial Diagnostic Register for a SPI bus
data output. Also, as shown in the Block Diagram, the OT
fault status bit information is ORed into a one-shot that
drives an open drain to provide an INT interrupt signal out-
put. The INT output has a specified timing from the one-shot
multi and is defined in the Electrical Specifications as tINT.
OL (Open-Load) Fault Mode
An open-load fault mode sequence consists of setting a sta-
tus flag (the OL Bit) when an output open load condition is
detected. If the output impedance is greater than a preset
threshold, as detected when the input is off; the status bit is
set. The OL Bit is reset on the next falling edge of the IN
input signal. The off-on detection sequence will repeat as
long as the output impedance is higher than the detection
threshold, as detected in the off state.
Diagnostic action for an OL fault mode differs from the OT
fault mode by not forcing an output shutdown through the
Gate Controlled Latch. Also, because the OL fault is
detected in the off state, the status flag is reset on the falling
edge of the input instead of the rising edge. The OL output
information to the Serial Diagnostic Register and the INT pin
is the same as the OT fault mode action.
ORed Fault Bits
It is important to note that the trigger input to the one-shot is
locked-out for the tINT duration and any fault that may have
occurred in the tINT window will not be displayed at the INT
output. However, all 8 fault bits may still be read as data from
the SO output when clock by the SCK input. The INT fault
output is provided as an interrupt signal to flag the immedi-
ate occurrence of a fault and take appropriate action as
defined by the microcontroller to the SPI bus and the users
programming. The INT fault output may be ORed with other
ICs to provide a system microcontroller interrupt to indicate
the presence of a fault.
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