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PDF HIP6011 Data sheet ( Hoja de datos )

Número de pieza HIP6011
Descripción Buck Pulse-Width Modulator (PWM) Controller and Output Voltage Monitor
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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HIP6011
September 1997
Buck Pulse-Width Modulator (PWM) Controller
and Output Voltage Monitor
Features
• Drives N-Channel MOSFET
• Operates From +5V or +12V Input
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
- Full 0% to 100% Duty Ratio
• Excellent Output Voltage Regulation
- 1.27V Internal Reference
- ±1.5% Over Line Voltage and Temperature
• Over-Voltage and Over-Current Fault Monitors
- Does Not Require Extra Current Sensing Element
- Uses MOSFET’s rDS(ON)
• Small Converter Size
- Constant Frequency Operation
- 200kHz Free-Running Oscillator Programmable
from 50kHz to Over 1MHz
Applications
• Power Supply for Pentium™, Pentium-Pro™,
PowerPC™ and Alpha™ Microprocessors
• High-Power 5V to 3.xV DC-DC Regulators
• Low-Voltage Distributed Power Supplies
Description
The HIP6011 provides complete control and protection for a
DC-DC converter optimized for high-performance micropro-
cessor applications. It is designed to drive an N-Channel
MOSFET in a standard buck topology. The HIP6011 inte-
grates all of the control, output adjustment, monitoring and
protection functions into a single package.
The output voltage of the converter can be precisely regu-
lated to as low as 1.27V, with a maximum tolerance of ±1.5%
over temperature and line voltage variations.
The HIP6011 provides simple, single feedback loop, voltage-
mode control with fast transient response. It includes a
200kHz free-running triangle-wave oscillator that is adjust-
able from below 50kHz to over 1MHz. The error amplifier
features a 15MHz gain-bandwidth product and 6V/µs slew
rate which enables high converter bandwidth for fast tran-
sient performance. The resulting PWM duty ratio ranges
from 0% to 100%.
The HIP6011 protects against over-current conditions by inhib-
iting PWM operation. The HIP6011 monitors the current by
using the rDS(ON) of the upper MOSFET which eliminates the
need for a current sensing resistor. Built-in over-voltage protec-
tion triggers an external SCR to crowbar the input supply.
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
HIP6011
0 to 70 14 Ld SOIC
PKG.
NO.
M14.15
Pinout
HIP6011
(SOIC)
TOP VIEW
VSEN 1
OCSET 2
SS 3
COMP 4
FB 5
EN 6
GND 7
14 RT
13 OVP
12 VCC
11 NC
10 BOOT
9 UGATE
8 PHASE
Alpha™ is a trademark of Digital Equipment Corporation.
Pentium™ is a trademark of Intel Corporation.
Pentium™ Pro is a trademark of Intel Corporation.
PowerPC™ is a trademark of IBM.
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
1
File Number 4409

1 page




HIP6011 pdf
HIP6011
Functional Description
Over-Current Protection
Initialization
The HIP6011 automatically initializes upon receipt of power.
Special sequencing of the input supplies is not necessary.
The Power-On Reset (POR) function continually monitors
the input supply voltages and the enable (EN) pin. The POR
monitors the bias voltage at the VCC pin and the input volt-
age (VIN) on the OCSET pin. The level on OCSET is equal
to VIN less a fixed voltage drop (see over-current protection).
With the EN pin held to VCC, the POR function initiates soft
start operation after both input supply voltages exceed their
POR thresholds. For operation with a single +12V power
source, VIN and VCC are equivalent and the +12V power
source must exceed the rising VCC threshold before POR
initiates operation.
The Power-On Reset (POR) function inhibits operation with
the chip disabled (EN pin low). With both input supplies
above their POR thresholds, transitioning the EN pin high ini-
tiates a soft start interval.
The over-current function protects the converter from a
shorted output by using the upper MOSFET’s on-resistance,
rDS(ON) to monitor the current. This method enhances the
converter’s efficiency and reduces cost by eliminating a
current sensing resistor.
4V
2V
0V
15A
10A
5A
Soft Start
0A
The POR function initiates the soft start sequence. An
internal 10µA current source charges an external capacitor
(CSS) on the SS pin to 4V. Soft start clamps the error ampli-
fier output (COMP pin) and reference input (+ terminal of
error amp) to the SS pin voltage. Figure 3 shows the soft
start interval with CSS = 0.1µF. Initially the clamp on the error
amplifier (COMP pin) controls the converter’s output voltage.
At t1 in Figure 3, the SS voltage reaches the valley of the
oscillator’s triangle wave. The oscillator’s triangular wave-
form is compared to the ramping error amplifier voltage. This
generates PHASE pulses of increasing width that charge the
output capacitor(s). This interval of increasing pulse width
continues to t2. With sufficient output voltage, the clamp on
the reference input controls the output voltage. This is the
interval between t2 and t3 in Figure 3. At t3 the SS voltage
exceeds the DACOUT voltage and the output voltage is in
regulation. This method provides a rapid and controlled out-
put voltage rise.
SOFT-START
(1V/DIV)
TIME (20ms/DIV)
FIGURE 4. OVER-CURRENT OPERATION
The over-current function cycles the soft-start function in a
hiccup mode to provide fault protection. A resistor (ROCSET)
programs the over-current trip level. An internal 200µA (typi-
cal) current sink develops a voltage across ROCSET that is
reference to VIN. When the voltage across the upper MOS-
FET (also referenced to VIN) exceeds the voltage across
ROCSET, the over-current function initiates a soft-start
sequence. The soft-start function discharges CSS with a
10µA current sink and inhibits PWM operation. The soft-start
function recharges CSS, and PWM operation resumes with
the error amplifier clamped to the SS voltage. Should an
overload occur while recharging CSS, the soft start function
inhibits PWM operation while fully charging CSS to 4V to
complete its cycle. Figure 4 shows this operation with an
overload condition. Note that the inductor current increases
to over 15A during the CSS charging interval and causes an
over-current trip. The converter dissipates very little power
with this method. The measured input power for the
conditions of Figure 4 is 2.5W.
The over-current function will trip at a peak inductor current
(IPEAK) determined by:
OUTPUT
VOLTAGE
IPEAK = I--O-----C----S----rE--D--T--S----(--O-R----NO----)-C----S----E----T--
0V (1V/DIV)
where IOCSET is the internal OCSET current source
0V (200µA - typical). The OC trip point varies mainly due to the
t1 t2
t3
MOSFET’s rDS(ON) variations. To avoid over-current tripping
in the normal operating load range, find the ROCSET resistor
TIME (5ms/DIV)
from the equation above with:
FIGURE 3. SOFT START INTERVAL
1) The maximum rDS(ON) at the highest junction
temperature.
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