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HIP9010 PDF даташит

Спецификация HIP9010 изготовлена ​​​​«Intersil Corporation» и имеет функцию, называемую «Engine Knock Signal Processor».

Детали детали

Номер произв HIP9010
Описание Engine Knock Signal Processor
Производители Intersil Corporation
логотип Intersil Corporation логотип 

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HIP9010 Даташит, Описание, Даташиты
Data Sheet
HIP9010
November 1998 File Number 3601.4
Engine Knock Signal Processor
The HIP9010 is used to provide a method of detecting
premature detonation or “Knock” in automotive engines.
A block diagram of this IC is shown in Figure 1. The chip
alternately selects one of the two sensors mounted on the
engine block. Two programmable bandpass filters process
the signal from both sensors, and divides the signal into two
channels. When the engine is not knocking, programmable
gain adjust stages are set to ensure that both the reference
channel and the knock channel contain similar energies.
This technique ensures that the detection system is
comparatively immune to changes in the engine background
noise level. When the engine is knocking, the energy in the
knock channel increases.
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
HIP9010AB
-40 to 125 20 Ld SOIC (W)
PKG.
NO.
M20.3
Features
• Two Sensor Inputs
• Microprocessor Programmable
• Accurate and Stable Filter Elements
• Digitally Programmable Gain
• Digitally Programmable Time Constants
• Digitally Programmable Filter Characteristics
• On-Chip Clock
• Operating Temperature Range -40oC to 125oC
Applications
• Engine Knock Detector Processor
• Analog Signal Processing where Controllable Filter
Characteristics are Required
Pinout
HIP9010
(SOIC)
TOP VIEW
VDD
GND
VMID
INOUT
1
2
3
4
NC 5
NC 6
INT/HOLD 7
CS 8
OSCIN 9
OSCOUT 10
20 S0IN
19 S0FB
18 S1FB
17 S1IN
16 NC
15 NC
14 TEST
13 SCK
12 MOSI
11 MISO
4-1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999









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HIP9010 Даташит, Описание, Даташиты
Simplified Block Diagram
(19) S0FB
(20) S0IN
-
+
(18) S1FB
(17) S1IN
-
+
POWER SUPPLY
AND
BIAS CIRCUITS
(3) VMID (1) VDD (2) GND
REFERENCE FREQUENCY CHANNEL
PROGRAMMABLE
BANDPASS
FILTER
1-20kHz
64 STEPS
PROGRAMMABLE
GAIN
STAGE
1-0.133
64 STEPS
ACTIVE
FULL WAVE
RECTIFIER
DIFFERENTIAL
TO
SINGLE-ENDED
CONVERTER
AND OUTPUT
DRIVER
INOUT (4)
PROGRAMMABLE
BANDPASS
FILTER
1-20kHz
64 STEPS
PROGRAMMABLE
STAGE
GAIN
1-0.133
64 STEPS
KNOCK FREQUENCY CHANNEL
PROGRAMMABLE
INTEGRATOR
40-600µs
32 STEPS
ACTIVE
FULL WAVE
RECTIFIER
TO SWITCHED
CAPACITOR
NETWORKS
REGISTERS
AND
STATE MACHINE
(14) TEST
CLOCK
OSCIN (9)
OSCOUT (10)
SPI
INTERSPACE
SCK (13)
CS (8)
MOSI (12)
MISO (11)
INT/HOLD (7)
FIGURE 1.









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HIP9010 Даташит, Описание, Даташиты
HIP9010
Absolute Maximum Ratings
DC Logic Supply, VDD . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Output Voltage, VO . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
Input Voltage, VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7V (Max)
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 125oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
115
Maximum Storage Temperature Range, TSTG . . . . -65oC to 150oC
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . .150oC
Maximum Lead Temperature (Soldering) . . . . . . . . . . . . . . . 300oC
At distance 1/16in ± 1/32in (1.59mm ± 0.79mm) from case
for 10s (Max) (SOIC - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications VDD = 5V, ±5%, GND = 0V, Clock Frequency 4MHz, ±0.5%, TA = -40oC to 125oC,
Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
DC ELECTRICAL CHARACTERISTICS
Quiescent Supply Current
Midpoint Voltage, Pin 3
Midpoint Voltage, Pin 3
Input Leakage, Pin 14
Internal Pull-Up Resistance, Pin 14
Leakage of Pins 7, 8, 12 and 13
Low Input Voltage, Pins 7, 8, 12 and 13
High Input Voltage, Pins 7, 8, 12 and 13
Low Level Output, Pin 11
Leakage Pin 11
Low Level Output, Pin 10
High Level Output, Pin 10
INPUT AMPLIFIERS
IDD
VMID
VMID
ILTEST
RTEST
IL
VIL
VIH
VOL
IL
VOL
VOH
VDD = 5.25V, GND = 0V
VDD = 5.0V, IL = 2mA Source
VDD = 5.0V, IL = 0mA
Measured at VDD = 5.0V
VDD = 5.0V, I Measure = 15µA
Measured at GND and VDD = 5V
ISOURCE = 4mA
Measured at GND and VDD = 5V
ISOURCE = 500µA, VDD = 5V
ISINK = -500µA, VDD = 5V
3 7.5 12 mA
2.3 2.45 2.55
V
2.4 2.5 2.6
V
- - 3 µA
30 100 200 K
- - ±3 µA
- - 30 % of VDD
70 -
- % of VDD
0.01 - 0.30 V
- - ±10 µA
- - 1.5 V
4.4 -
-V
S0FB and S1FB High Output Voltage
S0FB and S1FB Low Output Voltage
S0FB and S1FB Closed Loop
VOUTHI
VOUTLO
ACL
100µA ISINK, VDD = 5V
100µA ISOURCE, VDD = 5V
Input Resistor = 1M,
Feedback Resistor = 49.9k
4.7 4.9
-
V
- 15 200 mV
-25 -26 -27 dB
S0FB and S1FB Closed Loop
ACL Input Resistor = 47.5k,
Feedback Resistor = 475k
18 20 21 dB
ANTIALIASING FILTER
Response 1kHz to 20kHz,
Referenced to 1kHz
BW Test Mode, 70mVRMS Input to S0FB or - -2 - dB
S1FB, Output Pin 4
Attenuation at 180kHz
Referenced to 1kHz
ATEN Test Mode, 70mVRMS Input to S0FB or -10
-15
-
dB
S1FB, Output Pin 4
PROGRAMMABLE FILTERS
Peak to Peak Voltage Output
Filters Q (Note 2)
VOUTP-P Run Mode
Q Run Mode
3.5 4.0
- 2.5
- VP-P
-Q
PROGRAMMABLE GAIN AMPLIFIERS
Percent Amplifier Gain Deviation
Per Table 2
%G Run Mode
- ±1 - %
4-3










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