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PDF HFA1109EVAL Data sheet ( Hoja de datos )
| Número de pieza | HFA1109EVAL | |
| Descripción | 450MHz/ Low Power/ Current Feedback Video Operational Amplifier | |
| Fabricantes | Intersil Corporation | |
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HFA1109
March 1997
450MHz, Low Power, Current Feedback
Video Operational Amplifier
Features
Description
• Wide - 3dB Bandwidth (AV = +2) . . . . . . . . . . . . 450MHz
• Gain Flatness (To 250MHz) . . . . . . . . . . . . . . . . . . 0.8dB
• Very Fast Slew Rate (AV = +2) . . . . . . . . . . . . . 1100V/µs
• High Input Impedance . . . . . . . . . . . . . . . . . . . . . 1.7MΩ
• Differential Gain/Phase . . . . . . . . . 0.02%/0.02 Degrees
• Low Supply Current . . . . . . . . . . . . . . . . . . . . . . . 10mA
Applications
• Professional Video Processing
• Video Switchers and Routers
The HFA1109 is a high speed, low power, current feedback
amplifier built with Intersil’s proprietary complementary bipo-
lar UHF-1 process. This amplifier features a unique combi-
nation of power and performance specifically tailored for
video applications.
The HFA1109 is a standard pinout op amp. It is a higher
performance, drop-in replacement (no feedback resistor
change required) for the CLC409.
If a comparably performing op amp with an output disable
function (useful for video multiplexing) is required, please
refer to the HFA1149 data sheet.
Ordering Information
• Medical Imaging
• PC Multimedia Systems
• Video Distribution Amplifiers
• Flash Converter Drivers
• Radar/IF Processing
PART NUMBER
(BRAND)
HFA1109IP
HFA1109IB (H1109)
HFA11XXEVAL
TEMP.
RANGE (oC) PACKAGE
PKG.
NO.
-40 to 85 8 Ld PDIP
E8.3
-40 to 85 8 Ld SOIC
M8.15
DIP Evaluation Board for High Speed
Op Amps
Pinout
HFA1109
(PDIP, SOIC)
TOP VIEW
NC 1
-IN 2
+IN 3
V- 4
-
+
8 NC
7 V+
6 OUT
5 NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
File Number 4019.3
1 page  
HFA1109
Application Information
Optimum Feedback Resistor
Although a current feedback amplifier’s bandwidth depen-
dency on closed loop gain isn’t as severe as that of a voltage
feedback amplifier, there can be an appreciable decrease in
bandwidth at higher gains. This decrease may be minimized
by taking advantage of the current feedback amplifier’s
unique relationship between bandwidth and RF. All current
feedback amplifiers require a feedback resistor, even for
unity gain applications, and RF, in conjunction with the inter-
nal compensation capacitor, sets the dominant pole of the
frequency response. Thus, the amplifier’s bandwidth is
inversely proportional to RF. The HFA1109 design is opti-
mized for a 250Ω RF at a gain of +2. Decreasing RF
decreases stability, resulting in excessive peaking and over-
shoot (Note: Capacitive feedback will cause the same prob-
lems due to the feedback impedance decrease at higher
frequencies). At higher gains the amplifier is more stable, so
RF can be decreased in a trade-off of stability for bandwidth.
TABLE 1. OPTIMUM FEEDBACK RESISTOR
GAIN (ACL)
-1
+1
+2
RF (Ω)
200
250 (+RS = 550Ω) PDIP
250 (+RS = 700Ω) SOIC
250
BANDWIDTH (MHz)
400
350
450
+5 100
160
+10 90
70
Table 1 lists recommended RF values, and the expected
bandwidth, for various closed loop gains. For a gain of +1, a
resistor (+RS) in series with +IN is required to reduce gain
peaking and increase stability
ble oscillations. In most cases, the oscillation can be avoided
by placing a resistor (RS) in series with the output prior to
the capacitance.
RS and CL form a low pass network at the output, thus limit-
ing system bandwidth well below the amplifier bandwidth. By
decreasing RS as CL increases, the maximum bandwidth is
obtained without sacrificing stability. In spite of this, band-
width still decreases as the load capacitance increases.
Evaluation Board
The performance of the HFA1109 may be evaluated using
the HFA11XX evaluation board (part number
HFA11XXEVAL). Please contact your local sales office for
information. When evaluating this amplifier, the two 510Ω
gain setting resistors on the evaluation board should be
changed to 250Ω.
The layout and schematic of the board are shown in Figure 1.
.
BOARD SCHEMATIC
510Ω
50Ω
IN
10µF 0.1µF
510Ω
1
2
3
4
-5V
VH
8
7
6
5
GND
0.1µF
50Ω
10µF
+5V
OUT
VL
GND
TOP LAYOUT
PC Board Layout
The frequency response of this amplifier depends greatly on
the care taken in designing the PC board. The use of low
inductance components such as chip resistors and chip
capacitors is strongly recommended, while a solid ground
plane is a must! Attention should be given to decoupling the
power supplies. A large value (10µF) tantalum in parallel with a
small value (0.1µF) chip capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
input and output of the device. Capacitance directly on the
output must be minimized, or isolated as discussed in the
next section.
Care must also be taken to minimize the capacitance to ground
seen by the amplifier’s inverting input (-IN). The larger this
capacitance, the worse the gain peaking, resulting in pulse
overshoot and possible instability. Thus it is recommended that
the ground plane be removed under traces connected to -IN,
and connections to -IN should be kept as short as possible.
VH
1
+IN
OUT V+
VL V-
GND
BOTTOM LAYOUT
Driving Capacitive Loads
Capacitive loads, such as an A/D input, or an improperly ter-
minated transmission line will degrade the amplifier’s phase
margin resulting in frequency response peaking and possi-
FIGURE 1. EVALUATION BOARD SCHEMATIC AND LAYOUT
5
5 Page 
HFA1109
Dual-In-Line Plastic Packages (PDIP)
INDEX
AREA
N
12 3
-A-
BASE
PLANE
SEATING
PLANE
D1
B1
B
E1
N/2
-B-
D
-C- A2 A
L
D1
e
A1
eC
0.010 (0.25) M C A B S
E
CL
eA
C
eB
NOTES:
1. Controlling Dimensions: INCH. In case of conflict between
English and Metric dimensions, the inch dimensions control.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section
2.2 of Publication No. 95.
4. Dimensions A, A1 and L are measured with the package seated
in JEDEC seating plane gauge GS-3.
5. D, D1, and E1 dimensions do not include mold flash or protru-
sions. Mold flash or protrusions shall not exceed 0.010 inch
(0.25mm).
6. E and eA are measured with the leads constrained to be per-
pendicular to datum -C- .
7. eB and eC are measured at the lead tips with the leads uncon-
strained. eC must be zero or greater.
8. B1 maximum dimensions do not include dambar protrusions.
Dambar protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3,
E28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch
(0.76 - 1.14mm).
E8.3 (JEDEC MS-001-BA ISSUE D)
8 LEAD DUAL-IN-LINE PLASTIC PACKAGE
INCHES
MILLIMETERS
SYMBOL MIN MAX MIN MAX NOTES
A - 0.210 - 5.33 4
A1 0.015 - 0.39 - 4
A2
0.115
0.195
2.93
4.95
-
B
0.014
0.022
0.356
0.558
-
B1
0.045
0.070
1.15
1.77 8, 10
C
0.008
0.014
0.204
0.355
-
D 0.355 0.400 9.01 10.16
5
D1 0.005 - 0.13 - 5
E
0.300
0.325
7.62
8.25
6
E1
0.240
0.280
6.10
7.11
5
e 0.100 BSC
2.54 BSC
-
eA 0.300 BSC
7.62 BSC
eB - 0.430 - 10.92
L
0.115
0.150
2.93
3.81
6
7
4
N8
89
Rev. 0 12/93
11
11 Page | ||
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| PDF Descargar | [ Datasheet HFA1109EVAL.PDF ] | |
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