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HFA3925 PDF даташит

Спецификация HFA3925 изготовлена ​​​​«Intersil Corporation» и имеет функцию, называемую «null2.4GHz - 2.5GHz 250mW Power Amplifier».

Детали детали

Номер произв HFA3925
Описание null2.4GHz - 2.5GHz 250mW Power Amplifier
Производители Intersil Corporation
логотип Intersil Corporation логотип 

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HFA3925 Даташит, Описание, Даташиты
Data Sheet
HFA3925
July 1998
File Number 4132.4
2.4GHz - 2.5GHz 250mW Power Amplifier
The Intersil 2.4GHz PRISM™ chip set
is a highly integrated five-chip solution
for RF modems employing Direct
Sequence Spread Spectrum (DSSS)
signaling. The HFA3925 2.4GHz-
2.5GHz, 250mW power amplifier is one of the five chips in
the PRISM™ chip set (see the Typical Application Diagram).
The Intersil HFA3925 is an integrated power amplifier with
transmit/receive switch in a low cost SSOP 28 plastic
package. The power amplifier delivers +27dB of gain with
high efficiency and can be operated with voltages as low as
2.7V. The power amplifier switch is fully monolithic and can
be controlled with CMOS logic levels.
The HFA3925 is ideally suited for QPSK, BPSK or other
linearly modulated systems in the 2.4GHz Industrial,
Scientific, and Medical (ISM) frequency band. It can also be
used in GFSK systems where levels of +25dBm are
required. Typical applications include Wireless Local Area
Network (WLAN) and wireless portable data collection.
REMEMBER: Always apply Negative power to the VG
pins before applying the Positive VDD bias. Failure to do
so may result in the destruction of the HFA3925 Power
Amplifier.
Pinout
GND 1
GND 2
GND 3
GND 4
GND 5
GND 6
GND 7
RX OUT 8
VG2 9
GND 10
VDD1 11
GND 12
GND 13
VG1 14
HFA3925
(SSOP)
TOP VIEW
28 GND
27 VDD TR
26 T/R CNTRL
25 RF OUT
24 GND
23 VDD3
22 GND
21 GND
20 GND
19 GND
18 VDD2
17 VG3
16 GND
15 RF IN
Features
• Highly Integrated Power Amplifier with T/R Switch
• Operates Over 2.7V to 6V Supply Voltage
• High Linear Output Power (P1dB: +24dBm)
• Individual Gate Control for Each Amplifier Stage
• Low Cost SSOP-28 Plastic Package
Applications
• Systems Targeting IEEE 802.11 Standard
• TDD Quadrature-Modulated Communication Systems
• Wireless Local Area Networks
• PCMCIA Wireless Transceivers
• ISM Systems
• TDMA Packet Protocol Radios
• PCS/Wireless PBX
Ordering Information
PART NUMBER
HFA3925IA
HFA3925IA96
TEMP.
RANGE (oC)
PACKAGE
-40 to 85 28 Ld SSOP
-40 to 85 Tape and Reel
PKG.
NO.
M28.15
Functional Block Diagram
VDDX(+)
VGX(-)
T/R CNTRL
STAGE BIAS CONTROL
RX OUT
RF IN
STAGE 1 STAGE 2 STAGE 3
RF_OUT
TO
ANTENNA
2-179
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
PRISM® is a registered trademark of Intersil Corporation. PRISM logo is a trademark of Intersil Corporation.









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HFA3925 Даташит, Описание, Даташиты
Typical Application Diagram
HFA3925
HFA3724
(FILE# 4067)
TUNE/SELECT
HSP3824
(FILE# 4064)
HFA3424 (NOTE)
(FILE# 4131)
HFA3624
UP/DOWN
CONVERTER
(FILE# 4066)
RXI A/D
DPSK
DEMOD
DE-
SPREAD
I
RXQ
A/D
÷2
0o/90o M
U
M RSSI
U
802.11
A/D
CCA
MAC-PHY
INTERFACE
XX
TXI
RFPA
HFA3925
(FILE# 4132)
VCO VCO
DUAL SYNTHESIZER
Q
QUAD IF MODULATOR
TXQ
SPREAD
DPSK
MOD.
DSSS BASEBAND PROCESSOR
HFA3524 (FILE# 4062)
PRISM™ CHIP SET FILE #4063
TYPICAL TRANSCEIVER APPLICATION USING THE HFA3925
NOTE: Required for systems targeting 802.11 specifications.
For additional information on the PRISM™ chip set, call
(407) 724-7800 to access Intersil AnswerFAX system. When
prompted, key in the four-digit document number (File #) of
the datasheets you wish to receive.
The four-digit file numbers are shown in the Typical
Application Diagram, and correspond to the appropriate
circuit
2-180









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HFA3925 Даташит, Описание, Даташиты
HFA3925
Absolute Maximum Ratings
Maximum Input Power (Note 2) . . . . . . . . . . . . . . . . . . . . . . +23dBm
Operating Voltages (Notes 2, 3). . . . . . . . . . . . VDD = 8V, VGG = -8V
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θJA (oC/W)
SSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
88
Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θJA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications TA = 25oC, Z0 = 50, VDD = +5V, PIN = -30dBm, f = 2.45GHz, Unless Otherwise Specified
PARAMETER
MIN TYP MAX
UNITS
POWER AMPLIFIER
Linear Gain
27 28 32
dB
VSWR In/Out
- 1.75:1 -
Input Return Loss
- -11.3 -
dB
Output Return Loss
- -11.3 -
dB
Output Power at P1dB
Second Harmonic at P1dB
Third Harmonic at P1dB
IDD at P1dB (VDD1 + VDD2 + VDD3)
NOTES:
2. Ambient temperature (TA) = 25oC.
3. |VDD| + |VGG| not to exceed 12V.
22.5 24.5
-
- -20 0
- -30 -10
- 270 375
dBm
dBc
dBc
mA
Pin Description
PINS
1
2
3
4
5
SYMBOL
GND
GND
GND
GND
GND
6 GND
7 GND
8 RX OUT
9 VG2
10 GND
11 VDD1
12 GND
13 GND
14 VG1
15 RF IN
16 GND
DESCRIPTION
DC and RF Ground.
DC and RF Ground.
DC and RF Ground.
DC and RF Ground.
DC and RF Ground.
DC and RF Ground.
DC and RF Ground.
Output of T/R Switch for receive mode.
Negative bias control for the second PA stage, adjusted to set VDD2 quiescent bias current, which is typi-
cally 53mA. Typical voltage at pin = -0.75V. Input impedance: > 1M.
DC and RF Ground.
Positive bias for the first stage of the PA, 2.7V to 6V.
DC and RF Ground.
DC and RF Ground.
Negative bias control for the first PA stage, adjusted to set VDD1 quiescent bias current, which is typically
20mA. Typical voltage at pin = -0.75V. Input impedance: > 1M.
RF Input of the Power Amplifier.
DC and RF Ground.
2-181










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