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PDF HFBR-2116T Data sheet ( Hoja de datos )
| Número de pieza | HFBR-2116T | |
| Descripción | Fiber Optic Transmitter and Receiver Data Links for 155 MBd | |
| Fabricantes | Agilent(Hewlett-Packard) | |
| Logotipo | .gif "Agilent(Hewlett-Packard)"){kind=logo} |
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Fiber Optic Transmitter
and Receiver Data Links
for 155 MBd
Technical Data
HFBR-1116T Transmitter
HFBR-2116T Receiver
Features
• Full Compliance with the
Optical Performance
Requirements of the ATM
Forum UNI SONET OC-3
Multimode Physical Layer
Specification
• Other Versions Available for:
- FDDI
- Fibre Channel
• Compact 16-pin DIP Package
with Plastic ST* Connector
• Wave Solder and Aqueous
Wash Process Compatible
Package
• Manufactured in an ISO
9001 Certified Facility
Applications
• ATM Switches, Hubs, and
Network Interface Cards
• Multimode Fiber ATM
Wiring Closet-to-Desktop
Links
• Point-to-Point Data
Communications
• Replaces DLT/R1040-ST1
Model Transmitters and
Receivers
Description
The HFBR-1116/-2116 series of
data links are high-performance,
cost-efficient, transmitter and
receiver modules for serial
optical data communication
applications specified at 155 MBd
for ATM UNI applications.
These modules are designed for
50 or 62.5 µm core multimode
optical fiber and operate at a
nominal wavelength of 1300 nm.
They incorporate our high-
performance, reliable, long-
wavelength, optical devices and
proven circuit technology to give
long life and consistent
performance.
Transmitter
The transmitter utilizes a 1300 nm
surface-emitting InGaAsP LED,
packaged in an optical subassem-
bly. The LED is dc-coupled to a
custom IC which converts
differential-input, PECL logic
signals, ECL-referenced (shifted)
to a +5 V power supply, into an
analog LED drive current.
Receiver
The receiver utilizes an InGaAs
PIN photodiode coupled to a
custom silicon transimpedance
preamplifier IC. The PIN-
preamplifier combination is ac-
coupled to a custom quantizer IC
which provides the final pulse
shaping for the logic output and
the Signal Detect function. Both
the Data and Signal Detect
Outputs are differential. Also,
both Data and Signal Detect
Outputs are PECL compatible,
ECL-referenced (shifted) to a
+5 V power supply.
Package
The overall package concept for
the Data Links consists of the
following basic elements: two
optical subassemblies, two
electrical subassemblies, and the
outer housings as illustrated in
Figure 1.
*ST is a registered trademark of AT&T Lightguide Cable Connectors.
5965-3482E (8/96)
189
1 page  
Shipping Container
The data link modules are
packaged in a shipping container
designed to protect it from
mechanical and ESD damage
during shipment or storage.
Board Layout–Interface
Circuit and Layout
Guidelines
It is important to take care in the
layout of your circuit board to
achieve optimum performance
from these data link modules.
Figure 7 provides a good example
of a power supply filter circuit that
works well with these parts. Also,
suggested signal terminations for
the Data, Data-bar, Signal Detect
and Signal Detect-bar lines are
shown. Use of a multilayer,
ground-plane printed circuit board
will provide good high-frequency
circuit performance with a low
inductance ground return path. See
additional recommendations noted
in the interface schematic shown in
Figure 7.
+5 Vdc
GND
DATA
DATA
Tx Rx
*
A
L2
1
C2
0.1
R3 R2 R4 R1
82 82 130 130
9 NC
10 GND
11 VCC
12 VCC
13 GND
14 D
15 D
16 NC
NC 8
NO
PIN
7
GND 6
GND 5
GND 4
GND 3
VBB 2
NC 1
*
C5
0.1
* 9 NC
NC 8 *
10
NO
PIN
11 GND
GND 7
VCC 6
L1
1
12 GND
13 GND
VCC 5
VCC 4
C1 C7
C3 C4
0.1 10
0.1 10
(OPTIONAL)
14 SD
D3
15 SD
16
NO
PIN
D2
NC 1
R7 R5 R8 R6
82 82 130 130
C6
0.1 R9
82
R11
82
TERMINATE D, D
AT Tx INPUTS
TOP VIEWS
R10 R12
130 130
SD
A
DATA
DATA
SD
TERMINATE D, D, SD, SD AT
INPUTS OF FOLLOW-ON DEVICES
NOTES:
1. RESISTANCE IS IN OHMS. CAPACITANCE IS IN MICROFARADS. INDUCTANCE IS IN MICROHENRIES.
2. TERMINATE TRANSMITTER INPUT DATA AND DATA-BAR AT THE TRANSMITTER INPUT PINS. TERMINATE THE RECEIVER OUTPUT DATA, DATA-BAR, AND SIGNAL DETECT-
BAR AT THE FOLLOW-ON DEVICE INPUT PINS. FOR LOWER POWER DISSIPATION IN THE SIGNAL DETECT TERMINATION CIRCUITRY WITH SMALL COMPROMISE TO THE
SIGNAL QUALITY, EACH SIGNAL DETECT OUTPUT CAN BE LOADED WITH 510 OHMS TO GROUND INSTEAD OF THE TWO RESISTOR, SPLIT-LOAD PECL TERMINATION
SHOWN IN THIS SCHEMATIC.
3. MAKE DIFFERENTIAL SIGNAL PATHS SHORT AND OF SAME LENGTH WITH EQUAL TERMINATION IMPEDANCE.
4. SIGNAL TRACES SHOULD BE 50 OHMS MICROSTRIP OR STRIPLINE TRANSMISSION LINES. USE MULTILAYER, GROUND-PLANE PRINTED CIRCUIT BOARD FOR BEST HIGH-
FREQUENCY PERFORMANCE.
5. USE HIGH-FREQUENCY, MONOLITHIC CERAMIC BYPASS CAPACITORS AND LOW SERIES DC RESISTANCE INDUCTORS. RECOMMEND USE OF SURFACE-MOUNT COIL
INDUCTORS AND CAPACITORS. IN LOW NOISE POWER SUPPLY SYSTEMS, FERRITE BEAD INDUCTORS CAN BE SUBSTITUTED FOR COIL INDUCTORS. LOCATE POWER
SUPPLY FILTER COMPONENTS CLOSE TO THEIR RESPECTIVE POWER SUPPLY PINS. C7 IS AN OPTIONAL BYPASS CAPACITOR FOR IMPROVED, LOW-FREQUENCY NOISE
POWER SUPPLY FILTER PERFORMANCE.
6. DEVICE GROUND PINS SHOULD BE DIRECTLY AND INDIVIDUALLY CONNECTED TO GROUND.
7. CAUTION: DO NOT DIRECTLY CONNECT THE FIBER-OPTIC MODULE PECL OUTPUTS (DATA, DATA-BAR, SIGNAL DETECT, SIGNAL DETECT-BAR, VBB) TO GROUND WITHOUT
PROPER CURRENT LIMITING IMPEDANCE.
8. (*) OPTIONAL METAL ST OPTICAL PORT TRANSMITTER AND RECEIVER MODULES WILL HAVE PINS 8 AND 9 ELECTRICALLY CONNECTED TO THE METAL PORT ONLY AND
NOT CONNECTED TO THE INTERNAL SIGNAL GROUND.
Figure 7. Recommended Interface Circuitry and Power Supply Filter Circuits.
193
5 Page 
Notes:
1. This is the maximum voltage that can
be applied across the Differential
Transmitter Data Inputs to prevent
damage to the input ESD protection
circuit.
2. The outputs are terminated with 50 Ω
connected to VCC - 2 V.
3. The power supply current needed to
operate the transmitter is provided to
differential ECL circuitry. This
circuitry maintains a nearly constant
current flow from the power supply.
Constant current operation helps to
prevent unwanted electrical noise
from being generated and conducted
or emitted to neighboring circuitry.
4. This value is measured with the out-
puts terminated into 50 Ω connected
to VCC - 2 V and an Input Optical
Power level of -14 dBm average.
5. The power dissipation value is the
power dissipated in the transmitter
and receiver itself. Power dissipation
is calculated as the sum of the prod-
ucts of supply voltage and currents,
minus the sum of the products of the
output voltages and currents.
6. This value is measured with respect to
VCC with the output terminated into
50 Ω connected to VCC - 2 V.
7. The output rise and fall times are
measured between 20% and 80%
levels with the output connected to
VCC - 2 V through 50 Ω.
8. These optical power values are
measured with the following
conditions:
• The Beginning of Life (BOL) to the
End of Life (EOL) optical power
degradation is typically 1.5 dB per
the industry convention for long
wavelength LEDs. The actual
degradation observed in Hewlett-
Packard’s 1300 nm LED products
is < 1 dB, as specified in this data
sheet.
• Over the specified operating
voltage and temperature ranges.
• With 25 MBd (12.5 MHz square-
wave) input signal.
• At the end of one meter of noted
optical fiber with cladding modes
removed.
The average power value can be
converted to a peak power value by
adding 3 dB. Higher output optical
power transmitters are available on
special request.
9. The Extinction Ratio is a measure of
the modulation depth of the optical
signal. The data “0” output optical
power is compared to the data “1”
peak output optical power and
expressed as a percentage. With the
transmitter driven by a 25 MBd
(12.5 MHz square-wave) signal, the
average optical power is measured.
The data “1” peak power is then
calculated by adding 3 dB to the
measured average optical power. The
data “0” output optical power is found
by measuring the optical power when
the transmitter is driven by a logic “0”
input. The extinction ratio is the ratio
of the optical power at the “0” level
compared to the optical power at the
“1” level expressed as a percentage or
in decibels.
10. The transmitter will provide this low
level of Output Optical Power when
driven by a logic “0” input. This can
be useful in link troubleshooting.
11. The relationship between Full Width
Half Maximum and RMS values for
Spectral Width is derived from the
assumption of a Gaussian shaped
spectrum which results in a 2.35 X
RMS = FWHM relationship.
12. The optical rise and fall times are
measured from 10% to 90% when the
transmitter is driven by a 25 MBd
(12.5 MHz square-wave) input signal.
The ANSI T1E1.2 committee has
designated the possibility of defining
an eye pattern mask for the trans-
mitter output optical power as an
item for further study. HP will
incorporate this requirement into the
specifications for these products if it
is defined. The HFBR-1116T
transmitter typically complies with
the template requirements of CCITT
(now ITU-T) G.957 Section 3.25,
Figure 2 for the STM-1 rate,
excluding the optical receiver filter
normally associatd with single-mode
fiber measurements which is the
likely source for the ANSI T1E1.2
committee to follow in this matter.
13. Systematic Jitter contributed by the
transmitter is defined as the
combination of Duty Cycle Distortion
and Data Dependent Jitter.
Systematic Jitter is measured at 50%
threshold using a 155.52, 27 - 1
pseudo-random bit stream data
pattern input signal.
14. Random Jitter contributed the the
transmitter is specified with a 155.52
MBd (77.5 MHz square-wave) input
signal.
15. This specification is intended to
indicate the performance of the
receiver when Input Optical Power
signal characteristics are present per
the following definitions. The Input
Optical Power dynamic range from
the minimum level (with a window
time-width) to the maximum level is
the range over which the receiver is
guaranteed to provide output data
with a Bit-Error-Ratio (BER) better
than or equal to 2.5 x 10-10.
• At the Beginning of Life (BOL).
• Over the specified operating
voltage and temperature ranges.
• Input is a 155.52 MBd, 223 - 1
PRBS data pattern with a 72 “1”s
and 72 “0”s inserted per the CCITT
(now ITU-T) recommendation
G.958 Appendix 1.
• Receiver data window time-width is
1.23 ns or greater for the clock
recovery circuit to operate in. The
actual test window time-width is set
to simulate the effect of worst-case
input optical jitter based on the
transmitter jitter values from the
specification tables. The test
window time-width is 3.32 ns.
16. All conditions of Note 15 apply
except that the measurement is made
at the center of the symbol with now
window time-width.
17. Systematic Jitter contributed by the
receiver is defined as the combination
of Duty Cycle Distortion and Data
Dependent Jitter. The input optical
power level is at the maximum of
“PIN Min. (W).” Systematic Jitter is
measured at 50% threshold using a
155.52 MBd (77.5 MHz square-wave),
27 - 1 pseudo-random bit stream data
pattern input signal.
18. Random Jitter contributed by the
receiver is specified with a 155.52
MBd (77.5 MHz square-wave) input
signal.
19. This value is measured during the
transition from low to high levels of
input optical power.
20. This value is measured during the
transition from high to low levels of
input optical power.
21. The Signal Detect output shall be
asserted, logic-high (VOH), within
100 µs after a step increase of the
Input Optical Power.
22. Signal Detect output shall be
deasserted, logic-low (VOL), within
350 µs after a step decrease in the
Input Optical Power.
23. The HFBR-1116T transmitter com-
plies with the requirements for the
tradeoffs between center wavelength,
spectral width, and rise/fall times
shown in Figure 9. This figure is
derived from the FDDI PMD standard
(ISO/IEC 9314-3: 1990 and ANSI
X3.166 - 1990) per the description in
ANSI T1E1.2 Revision 3. The
interpretation of this figure is that
values of Center Wavelength and
Spectral Width must lie along the
appropriate Optical Rise/Fall Time
curve.
24. This value is measured with an
output load RL = 10 kΩ.
199
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| PDF Descargar | [ Datasheet HFBR-2116T.PDF ] | |
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