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HI-8010 PDF даташит

Спецификация HI-8010 изготовлена ​​​​«Holt Integrated Circuits» и имеет функцию, называемую «CMOS HIGH VOLTAGE DISPLAY DRIVER».

Детали детали

Номер произв HI-8010
Описание CMOS HIGH VOLTAGE DISPLAY DRIVER
Производители Holt Integrated Circuits
логотип Holt Integrated Circuits логотип 

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HI-8010 Даташит, Описание, Даташиты
January 2001
HI-8010/HI-8110 Series
GENERAL DESCRIPTION
The HI-8010 & HI-8110 high voltage display drivers
are constructed of MOS P Channel and N Channel
enhancement mode devices in a single monolithic
structure. They are designed to drive high voltage
liquid crystal displays by converting low level input
signals (TTL on the HI-8010 and CMOS on the
HI-8110) to high voltage drive signals.
Both devices can drive up to 38 segments and
require minimal display-to-data source interfacing.
Serial data is loaded and held in internal latches until
new display data is received.
The HI-8010 & HI-8110 are available in a variety of
ceramic and plastic packaging including DIP; leaded
and leadless chip carriers; and J-lead and gull-wing
quad flat packs.
FEATURES
! 5 volt input translated to 30 volts or less
! Pin-out adaptable to drive 30, 32 or 38
LCD segments
! RC oscillator or high voltage (BP) clock input
! TTL compatible inputs (HI-8010 only)
! CMOS compatible inputs (HI-8110 only)
! Low power consumption
! Industrial (-40°C to +85°C) & Military (-55°C
to +125°C) temperature ranges
! Pin for pin compatible with the Micrel
MIC8010/8011 series and the AMI S4520
series drivers
! Cascadable
! Military level processing available
! Dichroic Liquid Crystal Displays
! Standard Liquid Crystal Displays
! Vacuum Fluorescent Displays
PIN CONFIGURATION (Top View)
LD
DIN
LCDØ
LCDØOPT
VDD
S37
S38
S1
S2
S3
S4
S5
S6
39
2 HI-8010PQI 38
3
4
HI-8110PQI
37
36
5 HI-8010PQT 35
&6 34
7 33
8 HI-8110PQT 32
9 31
10
11
52 - PIN
30
29
12 PLASTIC QFP 28
S26
S25
S24
S23
S22
S21
S20
DOUT 38
N/C
N/C
N/C
BP
S19
(See page 3-6 for additional package pin configurations)
FUNCTIONAL BLOCK DIAGRAM
DIN
CL
ÞÞ
CS Þ
LD Þ
LCDØ Þ
LCDØ OPT Þ
Oscillator
Divider
Voltage
Translator
High Voltage
Buffer
Þ BP
DATA IN
38 Stage
Shift Register
CLK
Þ DOUT 38
Þ DOUT 32
Þ DOUT 30
LE 3 8 B i t L a t c h
Voltage
Translators
High Voltage
Drivers
SEGMENTS
(DS8010, Rev. C)
HOLT INTEGRATED CIRCUITS
3-3
01/01









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HI-8010 Даташит, Описание, Даташиты
HI-8010/HI-8110 Series
FUNCTIONAL DESCRIPTION
Whenever a Logic "0" is applied to the Chip Select (CS)
input, one bit of data is clocked into the shift register from the
serial data input (DIN) with each negative transition of the
Clock (CL) input. CS is internally tied to VSS on some
versions. A Logic "1" present at the Load (LD) input will
cause a parallel transfer of data from the shift register to the
data latch. If the Load (LD) input is held high while data is
clocked into the shift register, the latch will be transparent.
All four logic inputs are TTL compatible on the HI-8010 and
CMOS compatible on the HI-8110.
on the rising edge of the Clock (CL). Clock (CL), Load (LD)
and Chip Select (CS) should be tied in common with each
other, respectively, between all cascaded display drivers.
INTERNAL OSCILLATOR CIRCUIT
To display segments, a Logic "1" is stored in the appropriate
shift register bit position, and the segment output is out-of-
phase with the backplane.
The backplane output functions in 1 of 2 modes; externally
driven or self-oscillating. When the LCDØ input is externally
driven with the LCDØOPT input open circuit (Figure 2), the
backplane output will be in-phase with LCDØ. Utilizing the
self-oscillating mode, inputs LCDØ and LCDØOPT are tied
together and connected to an RC circuit (Figure 3).
A 150KW resistor with a 470pF capacitor generates an
approximate backplane frequency of 100Hz. The
LCDØ/LCDØOPT oscillator frequency is divided by 256 to
determine the backplane output frequency. The resistor
value (R) must be at least 30KW for proper self-oscillator
operation.
LCDØ
LCDØ
OPT
For displays having a number of segments greater than 38,
two or more of the display drivers may be cascaded together
by connecting the serial data output (DOUT) from the first
driver, to the serial data input (DIN) of the following driver,
etc. (See Figures 2 & 3). Data out (DOUT) will change state
÷ 256
Q
TO BACKPLANE
TRANSLATOR
AND DRIVER
Figure 1
TIMING DIAGRAM
CL
INPUT
DIN
INPUT
CS
INPUT
LD
INPUT
DOUT
OUTPUT
VALID
tDS
tDH
tCSS
tCSH
tCL
tCDO
tLS
VALID
tLCS
tCSL
tLW
HOLT INTEGRATED CIRCUITS
3-4









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HI-8010 Даташит, Описание, Даташиты
HI-8010/HI-8110 Series
ABSOLUTE MAXIMUM RATINGS
Voltages referenced to VSS = 0V
Supply Voltage
VDD........................ 0V to 7V
VEE................VDD-35V to 0V
Voltage at any input, except LCDØ..-0.3 to VDD+0.3V
Voltage at LCDØ input...............VDD-35 to VDD+0.3V
DC Current any input pin...................................10 mA
Power Dissipation......................................................300 mW
Operating Temperature Range - Industrial........-40° to +85°C
Operating Temperature Range - Hi-Temp/Mil..-55° to +125°C
Storage Temperature Range...........................-65° to +150°C
NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only.
Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
VDD = 5V, VEE = -25V, VSS = 0V, TA = Operating Temperature Range (unless otherwise specified).
PARAMETER
SYMBOL
CONDITION
MIN
TYP
MAX UNITS
Operating Voltage
VDD
3.0 7.0 V
Supply Current
IDD Static, No Load
200 µA
IEE Static, No Load fBP=100Hz
150 µA
Input Low Voltage, HI-8010 (except LCDØ) VILTTL
0 0.8 V
Input High Voltage, HI-8010 (except LCDØ) VIHTTL
2
VDD
V
Input Low Voltage, HI-8110 (except LCDØ) VILCMOS
0 0.3 VDD V
Input High Voltage, HI-8110 (except LCDØ) VIHCMOS
0.7 VDD
VDD
V
Input Low Voltage (LCDØ)
VILX
VEE
3V
Input High Voltage (LCDØ)
VIHX
3.5
VDD
V
Input Current
IIN VIN = 0 to 5V
1 µA
Input Capacitance (not tested)
CI
5 pF
Segment Output Impedance
RSEG
IL = 10µA
10,000 W
Backplane Output Impedance
RBP
IL = 10µA
450 W
Data Out Current:
IDOH Source Current, VOH = 4.5V
-0.6 mA
IDOL
Sink Current, VOL = 0.5V
0.6
mA
AC ELECTRICAL CHARACTERISTICS
VDD = 5V, VEE = -25V, VSS = 0V, TA = Operating Temperature Range (unless otherwise specified).
PARAMETER
SYMBOL VDD MIN TYP
Clock Period
tCL 5V 1200
Clock Pulse Width
tCW 5V 520
Data In - Setup
tDS 5V 50
Data In - Hold
tDH 5V 400
Chip Select - Setup to Clock
tCSS
5V 200
Chip Select - Hold to Clock
tCSH
5V 450
Load - Setup to Clock
tLS 5V 500
Chip Select - Setup to Load
tCSL
5V 300
Load Pulse Width
tLW 5V 500
Chip Select - Hold to Load
tLCS
5V 300
Data Out Valid, from Clock
tCDO
5V
HOLT INTEGRATED CIRCUITS
3-5
MAX
800
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns










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