HEF4001B PDF даташит
Спецификация HEF4001B изготовлена «NXP Semiconductors» и имеет функцию, называемую «Quadruple 2-input NOR gate». |
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Детали детали
Номер произв | HEF4001B |
Описание | Quadruple 2-input NOR gate |
Производители | NXP Semiconductors |
логотип |
11 Pages
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HEF4001B
Quad 2-input NOR gate
Rev. 10 — 10 December 2015
Product data sheet
1. General description
The HEF4001B is a quad 2-input NOR gate. The outputs are fully buffered for the highest
noise immunity and pattern insensitivity to output impedance.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +125 C
Complies with JEDEC standard JESD 13-B
Inputs and outputs are protected against electrostatic effects
3. Ordering information
Table 1. Ordering information
All types operate from 40 C to +125 C
Type number Package
Name Description
HEF4001BT SO14 plastic small outline package; 14 leads; body width 3.9 mm
4. Functional diagram
Version
SOT108-1
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Fig 1. Functional diagram
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Fig 2. Logic diagram (one gate)
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NXP Semiconductors
5. Pinning information
5.1 Pinning
HEF4001B
Quad 2-input NOR gate
Fig 3. Pin configuration
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5.2 Pin description
Table 2.
Symbol
nA
nB
nY
VSS
VDD
Pin description
Pin
1, 5, 8, 12
2, 6, 9, 13
3, 4, 10, 11
7
14
6. Functional description
Table 3.
Input
nA
L
L
H
H
Function table[1]
nB
L
H
L
H
[1] H = HIGH voltage level; L = LOW voltage level.
Description
input
input
output
ground (0 V)
supply voltage
Output
nY
H
L
L
L
HEF4001B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 10 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
2 of 11
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NXP Semiconductors
HEF4001B
Quad 2-input NOR gate
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground).
Symbol Parameter
Conditions
Min Max Unit
VDD supply voltage
IIK input clamping current
VI input voltage
IOK output clamping current
II/O input/output current
VI < 0.5 V or VI > VDD + 0.5 V
VO < 0.5 V or VO > VDD + 0.5 V
0.5 +18 V
- 10 mA
0.5 VDD + 0.5 V
- 10 mA
- 10 mA
IDD
Tstg
Tamb
Ptot
supply current
storage temperature
ambient temperature
total power dissipation
Tamb = 40 C to + 125 C
SO14
-
65
40
[1] -
50
+150
+125
mA
C
C
500 mW
P power dissipation
per output
- 100 mW
[1] For SO14 packages: above Tamb = 70 C, Ptot derates linearly with 8 mW/K.
8. Recommended operating conditions
Table 5.
Symbol
VDD
VI
Tamb
t/V
Recommended operating conditions
Parameter
Conditions
supply voltage
input voltage
ambient temperature
in free air
input transition rise and fall rate
VDD = 5 V
VDD = 10 V
VDD = 15 V
Min Typ Max Unit
3 - 15 V
0 - VDD V
40 - +125 C
- - 3.75 s/V
- - 0.5 s/V
- - 0.08 s/V
HEF4001B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 10 — 10 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
3 of 11
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