HEF40106B Datasheet PDF - NXP Semiconductors
| Part Number | HEF40106B | |
| Description | Hex inverting Schmitt trigger | |
| Manufacturers | NXP Semiconductors | |
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HEF40106B
Hex inverting Schmitt trigger
Rev. 7 — 21 November 2011
Product data sheet
1. General description
The HEF40106B provides six inverting buffers. Each input has a Schmitt trigger circuit.
The inverting buffer switches at different points for positive-going and negative-going
signals. The difference between the positive voltage (VT+) and the negative voltage (VT)
is defined as hysteresis voltage (VH).
The HEF40106B may be used for enhanced noise immunity or to “square up” slowly
changing waveforms.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Schmitt trigger input discrimination
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +125 C
Complies with JEDEC standard JESD 13-B
3. Applications
Wave and pulse shapers
Astable multivibrators
Monostable multivibrators
4. Ordering information
Table 1. Ordering information
All types operate from 40 C to +125 C
Type number
Package
Name
Description
Version
HEF40106BP
DIP14
plastic dual in-line package; 14 leads (300 mil)
SOT27-1
HEF40106BT
SO14
plastic small outline package; 14 leads; body width 3.9 mm
SOT108-1
HEF40106BTT
TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1
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NXP Semiconductors
HEF40106B
Hex inverting Schmitt trigger
11. Dynamic characteristics
Table 7. Dynamic characteristics
Tamb = 25 C; CL = 50 pF; tr = tf 20 ns; wave forms see Figure 4; test circuit see Figure 5; unless otherwise specified.
Symbol Parameter
Conditions VDD
Extrapolation formula[1] Min Typ Max Unit
tPHL HIGH to LOW
propagation delay
nA or nB to nY 5 V
10 V
63 ns + (0.55 ns/pF)CL
29 ns + (0.23 ns/pF)CL
-
-
90 180 ns
35 70 ns
15 V
22 ns + (0.16 ns/pF)CL -
30 60 ns
tPLH LOW to HIGH
propagation delay
nA or nB to nY 5 V
10 V
58 ns + (0.55 ns/pF)CL
29 ns + (0.23 ns/pF)CL
-
-
75 150 ns
35 70 ns
15 V
22 ns + (0.16 ns/pF)CL -
30 60 ns
tTHL HIGH to LOW output nY to LOW 5 V
transition time
10 V
10 ns + (1.00 ns/pF)CL
9 ns + (0.42 ns/pF)CL
-
-
60 120 ns
30 60 ns
15 V
6 ns + (0.28 ns/pF)CL -
20 40 ns
tTLH LOW to HIGH output nA or nB to 5 V
transition time
HIGH
10 V
10 ns + (1.00 ns/pF)CL
9 ns + (0.42 ns/pF)CL
-
-
60 120 ns
30 60 ns
15 V
6 ns + (0.28 ns/pF)CL -
20 40 ns
[1] Typical value of the propagation delay and output transition time can be calculated with the extrapolation formula (CL in pF).
Table 8. Dynamic power dissipation
VSS = 0 V; tr = tf 20 ns; Tamb = 25 C.
Symbol Parameter
VDD Typical formula
PD dynamic power
5 V PD = 2300 fi + (fo CL) VDD2 (W)
dissipation
10 V PD = 9000 fi + (fo CL) VDD2 (W)
15 V PD = 20000 fi + (fo CL) VDD2 (W)
where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
(fo CL) = sum of the outputs;
VDD = supply voltage in V.
HEF40106B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 21 November 2011
© NXP B.V. 2011. All rights reserved.
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| Download | [ HEF40106B.PDF Datasheet ] | |
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