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PDF HEF4060B Data sheet ( Hoja de datos )
| Número de pieza | HEF4060B | |
| Descripción | 14-stage ripple-carry binary counter/divider and oscillator | |
| Fabricantes | NXP Semiconductors | |
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HEF4060B
14-stage ripple-carry binary counter/divider and oscillator
Rev. 7 — 16 November 2011
Product data sheet
1. General description
The HEF4060B is a 14-stage ripple-carry binary counter/divider and oscillator with three
oscillator terminals (RS, REXT and CEXT), ten buffered outputs (Q3 to Q9 and Q11 to
Q13) and an overriding asynchronous master reset input (MR).
The oscillator configuration allows design of either RC or crystal oscillator circuits. The
oscillator may be replaced by an external clock signal at input RS. The clock input’s
Schmitt-trigger action makes it highly tolerant to slower clock rise and fall times. The
counter advances on the negative-going transition of RS. A HIGH level on MR resets the
counter (Q3 to Q9 and Q11 to Q13 = LOW), independent of other input conditions.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Tolerant of slow clock rise and fall times
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Inputs and outputs are protected against electrostatic effects
Specified from 40 C to +85 C
Complies with JEDEC standard JESD 13-B
3. Ordering information
Table 1. Ordering information
All types operate from 40 C to +85 C.
Type number
Package
Name
Description
HEF4060BP
DIP16
plastic dual in-line package; 16 leads (300 mil)
HEF4060BT
SO16
plastic small outline package; 16 leads; body width 3.9 mm
Version
SOT38-4
SOT109-1
1 page  
NXP Semiconductors
HEF4060B
14-stage ripple-carry binary counter/divider and oscillator
10. Dynamic characteristics
Table 7. Dynamic characteristics
Tamb = 25 C; VSS = 0 V; CL = 50 pF; tr = tf 20 ns; unless otherwise specified.
Symbol Parameter
Conditions
VDD
Extrapolation formula[1] Min Typ Max Unit
tpd propagation delay RS Q3;
5 V [2] 183 ns + (0.55 ns/pF) CL -
210 420 ns
see Figure 4 10 V
69 ns + (0.23 ns/pF) CL -
80 160 ns
15 V
42 ns + (0.16 ns/pF) CL -
50 100 ns
Qn Qn + 1; 5 V
-
- 25 50 ns
see Figure 4 10 V
-
- 10 20 ns
15 V
-
- 6 12 ns
MR Qn;
5V
73 ns + (0.55 ns/pF) CL -
100 200 ns
HIGH to LOW 10 V
see Figure 4 15 V
29 ns + (0.23 ns/pF) CL
22 ns + (0.16 ns/pF) CL
-
-
40 80 ns
30 60 ns
tt
transition time
see Figure 4
5 V [3] 10 ns + (1.00 ns/pF) CL -
60 120 ns
10 V
9 ns + (0.42 ns/pF) CL -
30 60 ns
15 V
6 ns + (0.28 ns/pF) CL -
20 40 ns
tW pulse width
minimum width; 5 V
120 60 -
ns
RS HIGH;
10 V
50 25 -
ns
see Figure 4 15 V
30 15 -
ns
minimum width; 5 V
50 25 -
ns
MR HIGH;
see Figure 4
10 V
15 V
30 15 -
20 10 -
ns
ns
trec recovery time
input MR;
see Figure 4
5V
10 V
160 80 -
80 40 -
ns
ns
15 V
60 30 -
ns
fmax maximum frequency input RS;
5V
see Figure 4 10 V
4 8-
10 20 -
MHz
MHz
15 V
15 30 -
MHz
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
[2] tpd is the same as tPHL and tPLH.
[3] tt is the same as tTHL and tTLH.
HEF4060B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 16 November 2011
© NXP B.V. 2011. All rights reserved.
5 of 15
5 Page 
NXP Semiconductors
HEF4060B
14-stage ripple-carry binary counter/divider and oscillator
SO16: plastic small outline package; 16 leads; body width 3.9 mm
SOT109-1
y
Z
16
D
pin 1 index
1
e
EA
X
c
HE
vM A
9
A2
A1
8
bp
wM
Q
(A3)
A
Lp
L
detail X
θ
0 2.5 5 mm
scale
DIMENSIONS (inch dimensions are derived from the original mm dimensions)
A
UNIT max. A1 A2 A3 bp
c
D (1) E (1)
e
HE
L
Lp Q
v
mm
1.75
0.25
0.10
1.45
1.25
0.25
0.49
0.36
0.25
0.19
10.0
9.8
4.0
3.8
1.27
6.2
5.8
1.05
1.0
0.4
0.7
0.6
0.25
inches
0.069
0.010
0.004
0.057
0.049
0.01
0.019 0.0100 0.39
0.014 0.0075 0.38
0.16
0.15
0.05
0.244
0.228
0.041
0.039
0.016
0.028
0.020
0.01
w y Z (1)
0.25 0.1
0.7
0.3
0.01
0.004
0.028
0.012
θ
8o
0o
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
OUTLINE
VERSION
SOT109-1
IEC
076E07
REFERENCES
JEDEC
JEITA
MS-012
EUROPEAN
PROJECTION
ISSUE DATE
99-12-27
03-02-19
Fig 13. Package outline SOT109-1 (SO16)
HEF4060B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 16 November 2011
© NXP B.V. 2011. All rights reserved.
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