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HEF4526B PDF даташит

Спецификация HEF4526B изготовлена ​​​​«NXP Semiconductors» и имеет функцию, называемую «Programmable 4-bit binary down counter».

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Номер произв HEF4526B
Описание Programmable 4-bit binary down counter
Производители NXP Semiconductors
логотип NXP Semiconductors логотип 

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HEF4526B Даташит, Описание, Даташиты
HEF4526B
Programmable 4-bit binary down counter
Rev. 5 — 22 November 2011
Product data sheet
1. General description
The HEF4526B is a synchronous programmable 4-bit binary down counter with active
HIGH and active LOW clock inputs (CP0, CP1), an asynchronous parallel load input (PL),
four parallel inputs (A0 to A3), a cascade feedback input (CF), four buffered parallel
outputs (Q0 to Q3), a terminal count output (TC), an overriding asynchronous master
reset input (MR) and a decoded TC output that can be used for divide-by-n applications.
In single stage applications the TC output is connected to PL. CF allows cascade
divide-by-n operation with no additional gates required.
Information on A0 to A3 is loaded into the counter while PL is HIGH, independent of all
other inputs except MR, which must be LOW. When PL and CP1 are LOW, the counter
advances on a LOW-to-HIGH transition of CP0. When PL is LOW and CP0 is HIGH, the
counter advances on a HIGH to LOW transition of CP1. TC is HIGH when the counter is in
the zero state (Q0 = Q1 = Q2 = Q3 = LOW) and CF is HIGH and PL is LOW. A HIGH on
MR resets the counter (Q0 to Q3 = LOW) independent of other inputs. The clock input is
highly tolerant of slower clock rise and fall times due to Schmitt trigger action.
It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS
(usually ground). Unused inputs must be connected to VDD, VSS, or another input.
2. Features and benefits
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from 40 C to +85 C
Complies with JEDEC standard JESD 13-B
3. Ordering information
Table 1. Ordering information
All types operate from 40 C to +85 C.
Type number
Package
Name
Description
HEF4526BP
DIP16
plastic dual in-line package; 16 leads (300 mil)
HEF4526BT
SO16
plastic small outline package; 16 leads; body width 3.9 mm
Version
SOT38-4
SOT109-1









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HEF4526B Даташит, Описание, Даташиты
NXP Semiconductors
4. Functional diagram
HEF4526B
Programmable 4-bit binary down counter
6 CP0
4 CP1
10 MR
13 CF
Fig 1. Functional diagram
3 5 11 14 2
PL A0 A1 A2 A3
PARALLEL LOAD
CIRCUITRY
CD/SD
BINARY
CP DOWN
COUNTER
CD
Q3 1
Q2 15
Q1 9
Q0 7
ZERO
DETECTOR
TC 12
001aae719
CP0 input
CP1 input
MR input
Q0
Q1
Q2
Q3
Fig 2. Timing diagram
1 2 4 8 16 32 64 128 256 512 1024 2048 4096
001aak014
HEF4526B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 22 November 2011
© NXP B.V. 2011. All rights reserved.
2 of 19









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HEF4526B Даташит, Описание, Даташиты
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A0
Q0 A1
Q1
A2 Q2
A3 Q3
PL
MR
CP1
CP0
CF
Fig 3. Logic diagram
CD1 CD2
O
FF
T1
O
SD
CD1 CD2
O
FF
T2
O
SD
CD1 CD2
O
FF
T3
O
SD
CD1 CD2
O
FF
T4
O
SD
TC
001aae722










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