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PDF NB639 Data sheet ( Hoja de datos )
| Número de pieza | NB639 | |
| Descripción | High Efficiency Fast Transient 8A 28V Synchronous Step-down Converter | |
| Fabricantes | MPS | |
| Logotipo |  |
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Sy
The Future of Analog IC Technology
NB639
High Efficiency, Fast Transient, 8A, 28V
nchronous Step-down Converter
In a Tiny QFN20 (3x4mm) Package
DESCRIPTION
The NB639 is a fully integrated, high frequen cy
synchronous rectif ied step-down switch mode
converter. It offers a very compac t solution t o
achieve 8A continuous output current over a wide
input supply range with excellent load and line
regulation. The NB639 operates at high efficiency
over a wide output current load range.
To further optimize efficiency at light load, this
device’s V CC supply is designed to be biased
externally.
Constant-On-Time (COT) control mode provi des
fast transient respo nse and eases loop
stabilization.
Full protection features in clude SCP, OCP, OVP,
UVP and thermal shutdown.
The NB639 requires a minimum number of readily
available st andard exte rnal components and is
available in a sp ace-saving QF N20 (3x4m m)
package.
FEATURES
• Wide 4.5V to 28V Operating Input Range
• 8A Output Current
• Internal 30mΩ High-Side, 12mΩ Low-Side
Power MOSFETs
• Proprietary Switching Loss Reduction
Technique
• 1% Reference Voltage
• Programmable Soft Start Time
• Soft Shutdown
• Programmable Switching Frequency
• SCP, OCP, OVP, UVP Protection and
Thermal Shutdown
• Output Adjustable from 0.8V to 13V
• Available in a QFN20 (3x4mm) Package
APPLICATIONS
• Notebook Systems and I/O Power
• Networking Systems
• Optical Communication Systems
• Distributed Power POL Systems
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Quality Assurance.
“MPS” and “The Future of Analog IC Technology” are Registered Trademarks of
Monolithic Power Systems, Inc.
TYPICAL APPLICATION
NB639 Rev.1.13
4/18/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
1
http://www.Datasheet4U.com
1 page  
NB639 – HIGH EFFICIENCY, FAST TRANSIENT SYNCHRONOUS STEP-DOWN CONVERTER
TYPICAL PERFORMANCE CHARACTERISTICS
VIN=12V, VOUT =1.05V, L=1.0µH, TA=+25°C, unless otherwise noted.
NB639 Rev.1.13
4/18/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
5
5 Page 
NB639 – HIGH EFFICIENCY, FAST TRANSIENT SYNCHRONOUS STEP-DOWN CONVERTER
1
2π× FSW
× C4
<
1
5
×
⎛⎜⎝⎞RR11
×
+
R2
R2
⎟
⎠
Then one can have:
(4)
IRI 4 =+C4 IFB ≈ IC4
(5)
The downward slope o f the V FB ripple can b e
estimated as:
VSLOPE1
=
−VOUT
R4 × C4
(6)
As one can see from equation (6 ), if there is
instability in PWM mode, one can reduce eith er
R4 or C4. If C4 can not be reduced further due to
limitation from equation (4), then one can only
reduce R4. From bench experiment s, VSLOPE1
is expected to be around 20~40V/ms.
In the case of POSCAP or
other types of
capacitor with higher E SR, the external ramp is
not necessary.
From our b ench experiments, it is recommend ed
to keep VSLOPE1 around 15~30V/ms.
While in skip mode, the downward slope is n ot
related to the external ramp.
In skip m ode, the downward slope of the V FB
ripple is the same whether the external ramp is
used or not. Figure 8 sh ows an equivalent circuit
with HS-FET off and the current modulato
r
regulating the LS-FET. The down ward slope of
the VFB ripple can be determined as follows (I MOD
is ignored here):
()VSLOPE2 =
−VREF
R1R+× 2 COUT
(8)
IMOD
Figure 7—Simplified Circuit in PWM Mode
without External Ramp Compensation
Figure 7 sh ows the equivalent circuit in PWM
mode with the HS-FET off an
d without an
external ramp circuit. The ESR ripple dominates
the output ripple. The downward slope of the V FB
ripple is:
VSLOPE1
=
−E× SR
L
VREF
(7)
From equation (7), o ne can see that th e
downward slope of V FB ripple is proportional to
ESR/L. Therefore, it’s necessary to know th e
minimum ESR value of the ou tput capacitor s
when no external ramp is used. Th ere is also a
limitation w ith inducta nce in th is case. T he
smaller the inductance, the more stable it will be.
Figure 8—Simplified Circuit in Skip Mode
To keep th e system stable during light load
condition, th e values of the FB re sistors should
not be too big. It is re commended to keep the
VSLOPE2 valu e around 0.4~0.8mV/ ms. It sho uld
be noted th at IMOD is excluded from the equatio n
because it does not impact the system’s stability
at light load conditions.
Bootstrap Charging
The floating power MOSFET driver i s
recommended to be powered by a n external V CC
through D2 as shown in Figure 9. This floatin g
driver has its own UVL O protection. This UVLO’s
rising thre shold is 2.2 V with a hysteresis of
150mV. U1 will regulate to m aintain BST voltage
across C4 If (V CC-VSW) is less tha n 3.5V. The
recommended external BST diode D2 is IN4148,
and the BST cap C4 is 0.1~1μF.
NB639 Rev.1.13
4/18/2012
www.MonolithicPower.com
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2012 MPS. All Rights Reserved.
11
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| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet NB639.PDF ] | |
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