|
|
PDF NCN49599 Data sheet ( Hoja de datos )
| Número de pieza | NCN49599 | |
| Descripción | Power Line Carrier Modem | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de NCN49599 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
NCN49599
Product Preview
Power Line Communication
Modem
The NCN49599 is a powerful spread frequency shift keying
(S−FSK) communication system−on−chip (SoC) designed for
www.onsemi.com
communication in hostile environments.
It combines a low power ARM Cortex M0 processor with a high
precision analogue front end and a robust line driver. Based on 4800
baud S−FSK dual−channel technology, it offers an ideal compromise
between speed and robustness.
It is functionally compatible with the NCN49597 and NCS5651
chip set, offering frequencies to cover all CENELEC bands for use in
applications such as e−metering, home automation and street lighting.
The NCN49599 benefits for more than 10 years of field experience in
1 56
QFN56 8x8, 0.5P
CASE 485CN
e−metering and delivers innovative features such as a smart
synchronization and in−band statistics.
Fully reprogrammable, the modem firmware can be updated in the
MARKING DIAGRAMS
field. Multiple royalty−free firmware options are available from
56
ON Semiconductor; refer to the separate datasheets for details. The
configurable GPIOs allow connecting peripherals such as LCDs or
metering ICs.
1
ON ARM
NCN49599
0C599−001
Features
• Power Line Communication (PLC) Modem for 50 Hz, 60 Hz and DC
AWLYYWWG
e3
Mains
• Embedded Highly Linear 2−stage Power Amplifier with Current
A = Assembly Location
WL = Wafer Lot Traceability
Limitation, Thermal Protection, Enable/Shutdown Control,
Rail−to−rail Drop of only ±1 V at Iout = 1.5 A
• Embedded ARM Cortex M0 Processor
YYWW = Date Code
G = Green Designator
• 8 General−purpose IOs Controllable by Software
• Embedded 32 kB RAM; Embedded 2 kB ROM
• Hardware Compliant with CENELEC EN 50065−1 and EN 50065−7
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 33 of this data sheet.
• Half Duplex S−FSK Channel, Data Rate Selectable:
300 – 600 – 1200 – 2400 – 4800 baud (@ 50 Hz);
360 – 720 – 1440 – 2880 – 5760 baud (@ 60 Hz)
• Programmable Carrier Frequencies in CENELEC A, B,
• Complete Handling of Protocol Layers (physical,
C and D Band
MAC, LLC)
• UART for Interfacing with an Application
• Repetition Boosting Robustness and Range of the
Microcontroller
Communication (IEC firmware)
• Power Supply 3.3 V and 12 V
• Wide Junction Temperature Range: −40°C to +125°C
Typical Applications
• AMR: Remote Automated Meter Reading
Available Firmware Options
• Building Automation
• IEC − Fully IEC61334−5−1, IEC 61334−4−32 and
• Solar Power Control and Monitoring
Linky Compliant
• ON PL110 − Mesh Networking with Collision
Avoidance and Error Correction
• Street Light Control and Monitoring
• Transmission of Alerts (fire, gas leak, water leak)
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
© Semiconductor Components Industries, LLC, 2014
August, 2015 − Rev. P3
1
Publication Order Number:
NCN49599/D
1 page  
Pin Description − QFN Package
NCN49599
B−
B+
VEE
RLIM
ILIM
VDD
VSS
IO3
IO4
IO5
IO0
TDO
TDI
TCK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
NCN49599
42 ALC_IN
41 TX_OUT
40 NC
39 TX_EN
38 TEST
37 RES
36 IO1
35 BR0
34 BR1
33 SEN
32 IO2
31 CSB
30 SDO
29 SDI
Figure 2. QFN Pin−out of NCN49599 (top view)
Table 4. NCN49599 QFN PIN FUNCTION DESCRIPTION
Pin Number
Pin Name
I/O
Type
Description
1 B− In A Inverting input of operational amplifier B
2 B+ In A Non−inverting input of operational amplifier B
3, 56
VEE
P Negative power supply amplifiers
4
RLIM
In
A Amplifier B current limit set resistor pin
5
ILIM In
A Current limit flag
6, 25
VDD
P 3.3 V digital supply
7, 24
VSS
In
P Digital ground
8..10, 17, 18
IO3...IO7
In/Out
D, 5VS, ST
General−purpose I/O’s (Note 3)
11, 36
IO0, IO1
In/Out
D, 5VS, ST
General−purpose I/O’s (Notes 3 and 4)
12
TDO
Out
D JTAG test data output (Note 5)
13 TDI In D, 5VS, PD, ST JTAG test data input (Note 5)
14
TCK
In
D, 5VS, PD
JTAG test clock (Note 5)
15
TMS
In
D, 5VS, PD
JTAG test mode select (Note 5)
16
TRSTB
In D, 5VS, PD, ST JTAG test reset (active low)
19
EXT_CLK_EN
In D, 5VS, PD, ST External clock enable input
20
TXD/PRES
Out
D, 5VS
Output of transmitted data (TXD) or PRE_SLOT signal (PRES)
21
XIN
In
A, 1.8V
Crystal oscillator input
22
XOUT
Out
A, 1.8V
Crystal oscillator output (output must be left floating when XIN is
driven by external clock)
3. The direction and function of the general−purpose I/O’s is controlled by the firmware. Depending on the firmware behavior, a general− purpose
IO (GPIO) used as an output may appear as an open−drain, push−pull or open−source pin. Refer to the firmware documentation for details.
4. During boot (i.e., before firmware has been uploaded) this pin is an output and indicates the status of the boot loader. Once firmware has
been loaded, the pin is available as a GPIO.
5. During normal operation, this pin must be tied to ground (recommended) or left open.
6. If the modem is not loading the firmware from an external SPI memory, it is recommended that this pin is tied to ground or Vdd.
7. During normal operation, it is recommended that this pin is tied to ground.
8. During normal operation, this pin must be tied to Vdd.
9. If a general purpose IO is configured as an output, the pull−down resistor is disconnected.
www.onsemi.com
5
5 Page 
NCN49599
Table 12. RECEIVER EXTERNAL PARAMETERS
Parameter
Test Conditions
Symbol
Min Typ Max Unit
Max. current delivered by REF_OUT
Power supply rejection ratio of the
receiver input section
f = 50 Hz (Note 22)
f = 10 kHz (Note 22)
IMax_REF_OUT
PSRRLPF_OUT
−300
35
10
300 mA
dB
dB
AGC gain step
AGC range
Analog ground reference output voltage Load current ±300 mA
Signal to noise ratio
Signal amplitude of 62.5% of the
full scale of the ADC
(Notes 20 and 23)
AGCstep
AGCrange
VREF_OUT
SNAD_OUT
5.3 6.7
39.9 44.1
1.52 1.65 1.78
54
dB
dB
V
dB
Clipping level at the output of the gain
stage (RX_OUT)
VCLIP_AGC_IN
1.05
1.65
VPK
Receive cascade gain
(Note 24)
f = 10 kHz, A = 250 mVpk
VRX_LPF_10kHz
−0.5
0
0.5
f = 148.5 kHz, A = 250 mVpk
VRX_LPF_148.5kHz −1.3
0.5
f = 195 kHz, A = 250 mVpk
VRX_LPF_195kHz
−4.5
−1
f = 245 kHz, A = 250 mVpk
VRX_LPF_245kHz
−3
f = 500 kHz, A = 250 mVpk
VRX_LPF_500kHz
−18
f = 1 MHz
VRX_LPF_1000kHz
−36
f = 2 MHz
VRX_LPF_2000kHz
−50
dB
20. Input at RX_IN, no other external components.
21. Characterization data only. Not tested in production.
22. A sinusoidal signal of 100 mVpp is injected between VDDA and VSSA. The signal level at the differential LPF_OUT and REF_OUT output
is measured to determine the parameter. The AGC gain is fixed at 42 dB.
23. These parameters will be tested in production with an input signal of 95 kHz and 1 VPK by reading out the digital samples at the output
of the ADC. The AGC gain is switched to 0 dB.
24. The cascade of the receive low−pass filter (LPF), AGC and low noise amplifier is production tested and must have a frequency characteris-
tic between the limits listed. The level is specified relative to the level at DC; the absolute output level will depend on the operating condition.
This test is done with the low−pass filter (LPF) tuned to include the CENELEC D−band.
Power−on−Reset (POR)
Table 13. POWER−ON−RESET
Parameter
Test Conditions
Symbol Min Typ Max Unit
POR threshold (Note 25)
VDD and VDDA rising
VPORH
2.7 V
VDD and VDDA falling
VPORL
2.1
Power supply rise time
0 to 3 V on both VDD and VDDA
TRPOR
1
ms
25. The nominal voltage on the pins VDD and VDDA (the digital and analog power supply) must be equal; both supply rails must be switched
together.
Digital Outputs: TDO, SCK, SDO, CSB, IO0..IO7
Table 14. DIGITAL OUTPUTS: TDO, SCK, SDO, CSB, IO0..IO7
Parameter
Test Conditions
Symbol
Min
Low output voltage (Note 26)
IXOUT = 4 mA
VOL
High output voltage (Note 26)
IXOUT = −4 mA
VOH
0.85 VDD
26. For IO0..IO7, this parameter only applies if the pin is configured as output pin by the firmware.
Typ
Max Unit
0.4 V
V
www.onsemi.com
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet NCN49599.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| NCN49597 | Power Line Carrier Modem | ON Semiconductor |
| NCN49599 | Power Line Carrier Modem | ON Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |