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PDF NCP81081 Data sheet ( Hoja de datos )
| Número de pieza | NCP81081 | |
| Descripción | Integrated Driver and MOSFET | |
| Fabricantes | ON Semiconductor | |
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NCP81081
Integrated Driver and
MOSFET
The NCP81081 integrates a MOSFET driver , high−side MOSFET
and low−side MOSFET into a 6 mm x 6 mm 40 −pin QFN package.
The driver and MOSFET s have been optimized for high−current
DC−DC buck power conversion applications. The NCP81081
integrated solution greatly reduces package parasitics and board space
compared to a discrete component solution.
Features
• Capable of Switching Frequencies Up to 1 MHz
• Capable of Output Currents Up to 35 A
• PWM Input Capable of 3.3 V and 5 V
• Internal Bootstrap Diode
• Zero Current Detection
• Undervoltage Lockout
• Internal Thermal Warning / Thermal Shutdown
• These are Pb−Free Devices
5 V 12−20 V
5V
ZCD Enable
Output
Disable
PWM
Thermal
Warning
VCIN
THWN
VIN
BOOT
ZCD_EN#
DISB#
PWM
CGND
PHASE
VSWH
PGND
Vout
Figure 1. Application Schematic
http://onsemi.com
1 40
QFN40
MN SUFFIX
CASE 485AZ
MARKING
DIAGRAM
1
NCP81081
AWLYYWWG
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
ORDERING INFORMATION
Device
Package
Shipping†
NCP81081MNR2G QFN40 2500/Tape & Reel
(Pb−Free)
NCP81081MNTWG QFN40 2500/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2012
March, 2012 − Rev. 1
1
Publication Order Number:
NCP81081/D
http://www.Datasheet4U.com
1 page  
NCP81081
APPLICATIONS INFORMATION
Theory of Operation
The NCP81081 is an integrated driver and MOSFET
module designed for use in a synchronous buck converter
topology. A single PWM input signal is all that is required
to properly drive the high−side and low−side MOSFETs.
Low−Side Driver
The low −side driver is designed
to drive a
ground−referenced low RDS(on) N−Channel MOSFET. The
voltage rail for the low−side driver is internally connected to
VCIN and PGND.
High−Side Driver
The high−side driver is designed to drive a floating low
RDS(on) N −channel MOSFET. The gate voltage for the
high side driver is developed by a bootstrap circuit
referenced to Switch Node (VSWH) pin.
The bootstrap circuit is comprised of the internal diode
and an external bootstrap capacitor. When the NCP81081 is
starting up, the VSWH pin is at ground, so the bootstrap
capacitor will charge up to VCIN through the bootstrap
diode See Figure 1. When the PWM input goes high, the
high−side driver will begin to turn on the high −side
MOSFET using the stored charge of the bootstrap capacito.r
As the high −side MOSFET turns on, the VSWH pin will
rise. When the high −side MOSFET is fully on, the switch
node will be at 12 V, and the BST pin will be at 5 V plus the
charge of the bootstrap capacitor (approaching 17 V).
The bootstrap capacitor is rechar ged when the switch
node goes low during the next cycle.
Zero Current Detect
When ZCD_EN# is set high, the NCP81081 will operate
in normal PWM mode.
When ZCD_EN# is set low , zero current detect (ZCD)
will be enabled. If PWM goes high, GH will go high after the
non−overlap delay. If PWM goes low, GL will go high after
the non−overlap delay, and stay high for the duration of the
ZCD blanking timer. Once this timer has expired, VSWH
will be monitored for zero current detection, and will pull
GL low once detected. The threshold on VSWH to
determine zero current undergoes an auto-calibration cycle
every time DISB# is brought from low to high.
This
auto-calibration cycle typically takes 25 ms to complete.
Safety Timer and Overlap Protection Circuit
It is very important that MOSFETs in a synchronous buck
regulator do not both conduct at the same time. Excessive
shoot−through or cross conduction can damage the
MOSFETs, and even a small amount of cross conduction
will cause a decrease in the power conversion efficiency.
The NCP81081 prevents cross conduction by monitoring
the status of the MOSFET s and applying the appropriate
amount of “dead−time” or the time between the turn off of
one MOSFET and the turn on of the other MOSFET.
When the PWM input pin goes high, the gate of the
low−side MOSFET (GL pin) will go low after a propagation
delay (tpdlGL). The time it takes for the low−side MOSFET
to turn of f (tfGL) is dependent on the total char ge on the
low−side MOSFET gate. The NCP81081 monitors the gate
voltage of both MOSFET s and the switchnode voltage to
determine the conduction status of the MOSFETs. Once the
low−side MOSFET is turned off an internal timer will delay
(tpdhGH) the turn on of the high−side MOSFET.
Likewise, when the PWM input pin goes low, the gate of
the high −side MOSFET (GH pin) will go low after the
propagation delay (tpdlGH). The time to turn of f the
high−side MOSFET (tfGH) is dependent on the total gate
charge of the high−side MOSFET. A timer will be triggered
once the high −side MOSFET has stopped conducting, to
delay (tpdhGL) the turn on of the low−side MOSFET.
Thermal Warning / Thermal Shutdown
When the temperature of the driver reaches 150 °C, the
THWN pin will be pulled low indicating a thermal warning.
At this point, the part continues to function normally. When
the temperature drops below 135 °C, the THWN will go
high.
If the driver temperature exceeds 180 °C, the part will
enter thermal shutdown and turn off both MOSFETs. Once
the temperature falls below 155 °C, the part will resume
normal operation. The THWN pin has a maximum current
capability of 30 mA.
Power Supply Decoupling
The NCP81081 can source and sink relatively lar ge
current to the gate pins of the MOSFET s. In order to
maintain a constant and stable supply voltage (VCIN) alow
ESR capacitor should be placed near the power and ground
pins. A 1 mF to 4.7 mF multi layer ceramic capacitor
(MLCC) is usually sufficient.
Bootstrap Circuit
The bootstrap circuit uses a char ge storage capacitor
(CBST) and the internal diode. The bootstrap capacitor must
have a voltage rating that is able to withstand twice the
maximum supply voltage. A minimum 50 V rating is
recommended. A bootstrap capacitance greater than 100 nF
and a minimum 50V rating is recommended. A good quality
ceramic capacitor should be used.
http://onsemi.com
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