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PDF HD155101BF Data sheet ( Hoja de datos )
| Número de pieza | HD155101BF | |
| Descripción | RF Single-chip Linear IC for GSM and EGSM Systems | |
| Fabricantes | Hitachi Semiconductor | |
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HD155101BF
RF Single-chip Linear IC for GSM and EGSM Systems
ADE-207-256A (Z)
2nd Edition
September 1998
Description
The HD155101BF was developed for GSM and EGSM cellular systems, and integrates most of the
functions of a transceiver. The HD155101BF incorporates the bias circuit for a RF LNA, a 1st mixer, 1st-
IF amplifier, 2nd mixer, AGC amplifier and an IQ quadrature demodulator for the receiver, and an IQ
quadrature modulator and offset PLL for the transmitter. Also, on chip are the dividers for the 1st & 2nd
local oscillator signals and 90˚ phase splitter. Moreover the HD155101BF includes control circuits to
implement power saving modes. These functions can operate down to 2.7 V and are housed in a 48-pin
LQFP SMD package.
Hence the HD155101BF can form a small size transceiver handset for GSM and EGSM by adding a PLL
frequency synthesizer IC, a power amplifier and some external components. See page 7 “Configuration”.
The HD155101BF is fabricated using a 0.6 µm double-polysilicon Bi-CMOS process.
Functions
Receiver (RX)
• Low Noise Amplifier (LNA) bias circuit
• 1st mixer
• IF amplifier
• 2nd mixer
• Automatic gain control amplifier (AGC)
• IQ demodulator with 90° phase splitter
Transmitter (TX)
• IQ modulator with 90° phase splitter
• Offset PLL
Down converter
Phase comparator
TX VCO driver
1 page  
HD155101BF
Pin Function (cont)
Pin
No. Symbol
25 QOUTB
Input/
Output
Output
26 QOUT
Output
27 IOUTB
Output
28 IOUT
Output
29 VCONT
Input
30 GNDDIV Gnd
31 VCCDIV Vcc
32 AGCOUTB Output
33 AGCOUT Output
34 VCCAGC Vcc
35 GNDAGC Gnd
36 MIX2OB Output
37 MIX2O
Output
38 IFINB
Input
39 IFIN
Input
40 GNDIF
Gnd
41 VCCIF
Vcc
42 MIX1OUT Output
43 MIX1OUTB Output
44 RFLOIN Input
45 VCCMIX1 Vcc
46 GNDMIX1 Gnd
47 MIX1INB Input
48 MIX1IN
Input
Meaning of symbol
Q signal OUTput Bar
Q signal OUTput
I signal OUTput Bar
I signal OUTput
Voltage of AGC
CONTrol
GND of DIVider block
VCC of DIVider block
AGC OUTput Bar
AGC OUTput
VCC of AGC block
GND of AGC block
MIX2 Output Bar
MIX2 Output
1stIF signal INput Bar
1stIF signal INput
GND of IFMIX2 block
VCC of IFMIX2 block
MIX1 Output
MIX1 Output Bar
RF LOcal signal INput
VCC of MIX1 block
GND of MIX1 block
MIX1 Input Bar
MIX1 Input
Function
Q negative signal output of IQ quadrature
demodulator
Q positive signal output of IQ quadrature
demodulator
I negative signal output of IQ quadrature
demodulator
I positive signal output of IQ quadrature
demodulator
The DC voltage input to control the power gain of
AGC
Ground of divider to make IF local signals
Power supply of divider to make IF local signals
AGC negative signal output to be fed to IQ
quadrature demodulator
AGC positive signal output to be fed to IQ
quadrature demodulator
Power supply of AGC
Ground of AGC
2nd mixer (MIX2) negative signal output to be fed
to AGC
2nd mixer (MIX2) positive signal output to be fed to
AGC
IFAMP negative signal input for 1st IF signal
IFAMP positive signal input for 1st IF signal
Ground of IFAMP and 2nd mixer (MIX2)
Power supply of IFAMP and 2nd mixer (MIX2)
1st mixer (MIX1) positive signal output
1st mixer (MIX1) negative signal output
RF 1st local signal input to be fed to 1st mixer
(MIX1) and the down converter of offset PLL
Power supply of 1st mixer (MIX1)
Ground of 1st mixer (MIX1)
1st mixer (MIX1) negative signal input
1st mixer (MIX1) positive signal input
5 Page 
HD155101BF
Power saving is implemented through use of the idle mode. All function blocks of the HD155101BF are
switched off until such time as the system controller commends the device to power up again.
Table 1 Operating Modes with Power Saving
Mode
POONRX1 (pin 1)
switch
POONRX2 (pin 2)
POONTX (pin 7)
HD155101BF LNA bias
circuit status 1st mixer
IF AMP
2nd mixer
AGC
IO demodulator
Divider (Rx.)
Divider (Tx.)
IO modulator
Offset PLL
RF 1st local buffer
IF local buffer
IFVCO
Total current
Receive
(Rx)
H
H
L
ON
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
ON
ON
ON
42.5 mA Typ
Calibrate
(Cal)
L
H
L
OFF
OFF
ON
ON
ON
ON
ON
OFF
OFF
OFF
ON
ON
ON
32 mA Typ
Warm-up
(Lo-ON)
L
L
L
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
10.5 mA Typ
Transmit
(Tx)
L
L
H
OFF
OFF
OFF
OFF
OFF
OFF
OFF
ON
ON
ON
ON
ON
ON
38 mA Typ
Idle
(PS)
H
L
Don’t care
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
1 µA Typ
4.615ms
4.615ms
The slots of
GSM system
7012345670123456701
Rx Tx Mon Rx Tx Mon
Cal Cal Cal Cal
Operating modes
of the HD155101BF
Rx
Lo-ON
Tx
Lo-
ON
Rx
Lo-
ON
Rx
Lo-ON
Tx
Lo-
ON
Rx
Lo-
ON
PS
POONRX1(pin 1)
POONRX2(pin 2)
POONTX (pin 7)
Idle(PS) mode don’t care
Power Amplifier ON
UHF PLL synth. ON
UHF PLL synth. load
VCO control voltage
of UHF PLL synth.
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HD155101BF.PDF ] | |
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