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HD3-6408-9 PDF даташит

Спецификация HD3-6408-9 изготовлена ​​​​«Intersil Corporation» и имеет функцию, называемую «CMOS Asynchronous Serial Manchester Adapter (ASMA)».

Детали детали

Номер произв HD3-6408-9
Описание CMOS Asynchronous Serial Manchester Adapter (ASMA)
Производители Intersil Corporation
логотип Intersil Corporation логотип 

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HD3-6408-9 Даташит, Описание, Даташиты
HD-6408
March 1997
CMOS Asynchronous Serial
Manchester Adapter (ASMA)
Features
Description
• Low Bit Error Rate
• Data Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1MBit/s
• Sync Identification and Lock-In
• Clock Recovery
• Manchester II Encoder, Decoder
• Separate Encode and Decode
• Low Operating Power . . . . . . . . . . . . . . . . . 50mW at 5V
• Single Power Supply
• 24 Lead Package
Ordering Information
PACKAGE
PDIP
CERDIP
TEMP. RANGE
-40oC to +85oC
-40oC to +85oC
PART
NUMBER
HD3-6408-9
HD1-6408-9
PKG.
NO.
E24.6
E24.6
The HD-6408 is a CMOS/LSI Manchester Encoder/Decoder
for creating a very high speed asynchronous serial data bus.
The Encoder converts serial NRZ data (typically from a shift
register) to Manchester II encoded data, adding a sync pulse
and parity bit. The Decoder recognizes this sync pulse and
identifies it as a Command Sync or a Data Sync. The data is
then decoded and shifted out in NRZ code (typically into a
shift register). Finally, the parity bit is checked. If there were
no Manchester or parity errors the Decoder responds with a
valid word signal. The Decoder puts the Manchester code to
full use to provide clock recovery and excellent noise immu-
nity at these very high speeds.
The HD-6408 can be used in many commercial applications
such as security systems, environmental control systems,
serial data links and many others. It utilizes a single 12 x
clock and achieves data rates of up to one million bits per
second with a very minimum overhead of only 4 bits out of
20, leaving 16 bits for data.
Pinout
d
HD-6408 (DIP)
TOP VIEW
VW 1
ESC 2
TD 3
SDO 4
DC 5
BZI 6
BOI 7
UDI 8
DSC 9
CDS 10
DR 11
GND 12
24 VCC
23 EC
22 SCI
21 SD
20 SS
19 EE
18 SDI
17 BOO
16 OI
15 BZO
14 DBS
13 MR
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
5-1
File Number 2952.1









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HD3-6408-9 Даташит, Описание, Даташиты
Block Diagrams
ENCODER
HD-6408
DECODER
23
EC
÷6
SCI
ESC
SD
22
2
21
SS 20
÷ 2 BIT COUNTER
RESET COUNT
DECODER
SYNC
PARITY
CHARACTER
FORMER
SDI 18
DATA
19
EE
14
DBS
13
MR
15
16 BZO
17
OI
BOO
11
DR
BIT COUNTER
1 VALID
VW WORD
LATCH
TD
CDS
3
10
SYNC
LATCH
VALID
WORD
TEST
CIRCUIT
DC
DSC
5
9
CLOCK
SYNCHRO-
NIZER
6
BZI
BOI
7
8
TRANSITION
FINDER
UDI
CHARACTER
IDENTIFIER
PARITY
CHECK
NRZ 4
OUTPUT SDO
PORT
5-2









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HD3-6408-9 Даташит, Описание, Даташиты
Pin Description
PIN TYPE
1O
2O
SYMBOL
VW
ESC
3O
TD
4O
5I
SDO
DC
6I
7I
8I
9O
10 O
BZI
BOI
UDI
DSC
CDS
11 I
12 I
13 I
14 O
15 O
16 I
17 O
18 I
19 I
20 I
21 O
22 I
23 I
24 I
DR
GND
MR
DBS
BZO
OI
BOO
SDI
EE
SS
SD
SCI
EC
VCC
HD-6408
SECTION
Decoder
Encoder
Decoder
Decoder
Decoder
Decoder
Decoder
Decoder
Decoder
Decoder
Decoder
Both
Both
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Encoder
Both
DESCRIPTION
Output high indicates receipt of a VALID WORD.
ENCODER SHIFT CLOCK is an output for shifting data into the Encoder. The En-
coder samples SDI on the low-to-high transition of ESC.
TAKE DATA output is high during receipt of data after identification of a sync pulse
and two valid Manchester data bits.
SERIAL DATA OUT delivers received data in correct NRZ format.
DECODER CLOCK input drives the transition finder, and the synchronizer which
in turn supplies the clock to the balance of the Decoder. Input a frequency equal to
12X the data rate.
A high input should be applied to BIPOLAR ZERO IN when the bus is in its negative
state. This pin must be held high when the Unipolar input is used.
A high input should be applied to BIPOLAR ONE IN when the bus is in its positive
state, this pin must be held low when the Unipolar input is used.
With pin 6 high and pin 7 low, this pin enters UNIPOLAR DATA IN to the transition
finder circuit. If not used this input must be held low.
DECODER SHIFT CLOCK output delivers a frequency (DECODER CLOCK ÷ 12),
synchronized by the recovered serial data stream.
COMMAND/DATA SYNC output high occurs during output of decoded data which
was preceded by a Command synchronizing character. A low output indicates a
Data synchronizing character.
A high input to DECODER RESET during a rising edge of DECODER SHIFT
CLOCK resets the decoder bit counting logic to a condition ready for a new word.
GROUND supply pin.
A high on MASTER RESET clears the 2:1 counters in both the encoder and decod-
er and the ÷ 6 counter.
DIVIDE BY SIX is an output from 6:1 divider which is driven by the ENCODER
CLOCK.
BIPOLAR ZERO OUT is a active low output designed to drive the zero or negative
sense of a bipolar line driver.
A low on OUTPUT INHIBIT forces pin 15 and 17 high, their inactive states.
BIPOLAR ONE OUT is an active low output designed to drive the one or positive
sense of a bipolar line driver.
SERIAL DATA IN accepts a serial data stream at a data rate equal to ENCODER
SHIFT CLOCK.
A high on ENCODER ENABLE initiates the encode cycle. (Subject to the preced-
ing cycle being completed).
SYNC SELECT actuates a Command sync for an input high and data sync for an
input low.
SEND DATA is an active high output which enables the external source of serial
data.
SEND CLOCK IN is 2X the Encoder data rate.
ENCODER CLOCK is the input to the 6:1 divider.
VCC is the +5V power supply pin. A 0.1µF decoupling capacitor from VCC (pin 24)
to GND (pin 12) is recommended.
5-3










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Номер в каталогеОписаниеПроизводители
HD3-6408-9CMOS Asynchronous Serial Manchester Adapter (ASMA)Intersil Corporation
Intersil Corporation

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