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HD3-6409-9 PDF даташит

Спецификация HD3-6409-9 изготовлена ​​​​«Intersil Corporation» и имеет функцию, называемую «CMOS Manchester Encoder-Decoder».

Детали детали

Номер произв HD3-6409-9
Описание CMOS Manchester Encoder-Decoder
Производители Intersil Corporation
логотип Intersil Corporation логотип 

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HD3-6409-9 Даташит, Описание, Даташиты
HD-6409
March 1997
CMOS Manchester Encoder-Decoder
Features
• Converter or Repeater Mode
• Independent Manchester Encoder and Decoder
Operation
• Static to One Megabit/sec Data Rate Guaranteed
• Low Bit Error Rate
• Digital PLL Clock Recovery
• On Chip Oscillator
• Low Operating Power: 50mW Typical at +5V
• Available in 20 Lead Dual-In-Line and 20 Pad LCC
Package
Ordering Information
PACKAGE
PDIP
SOIC
CERDIP
DESC
CLCC
DESC
TEMPERATURE
RANGE
-40oC to +85oC
-40oC to +85oC
-40oC to +85oC
-55oC to 125oC
-40oC to +85oC
-55oC to 125oC
1 MEGABIT/SEC
HD3-6409-9
HD9P6409-9
HD1-6409-9
5962-9088801MRA
HD4-6409-9
5962-9088801M2A
PKG.
NO.
E20.3
M20.3
F20.3
F20.3
J20.A
J20.A
Description
The HD-6409 Manchester Encoder-Decoder (MED) is a high
speed, low power device manufactured using self-aligned sil-
icon gate technology. The device is intended for use in serial
data communication, and can be operated in either of two
modes. In the converter mode, the MED converts Non
return-to-Zero code (NRZ) into Manchester code and
decodes Manchester code into Nonreturn-to-Zero code. For
serial data communication, Manchester code does not have
some of the deficiencies inherent in Nonreturn-to-Zero code.
For instance, use of the MED on a serial line eliminates DC
components, provides clock recovery, and gives a relatively
high degree of noise immunity. Because the MED converts
the most commonly used code (NRZ) to Manchester code,
the advantages of using Manchester code are easily realized
in a serial data link.
In the Repeater mode, the MED accepts Manchester code
input and reconstructs it with a recovered clock. This mini-
mizes the effects of noise on a serial data link. A digital
phase lock loop generates the recovered clock. A maximum
data rate of 1MHz requires only 50mW of power.
Manchester code is used in magnetic tape recording and in
fiber optic communication, and generally is used where data
accuracy is imperative. Because it frames blocks of data, the
HD-6409 easily interfaces to protocol controllers.
Pinouts
HD-6409 (CERDIP, PDIP, SOIC)
TOP VIEW
HD-6409 (CLCC)
TOP VIEW
BZI 1
BOI 2
UDI 3
SD/CDS 4
SDO 5
SRST 6
NVM 7
DCLK 8
RST 9
GND 10
20 VCC
19 BOO
18 BZO
17 SS
16 ECLK
15 CTS
14 MS
13 OX
12 IX
11 CO
3 2 1 20 19
SD/CDS 4
18 BZO
SDO 5
17 SS
SRST 6
16 ECLK
NVM 7
15 CTS
DCLK 8
14 MS
9 10 11 12 13
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
5-1
File Number 2951.1









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HD3-6409-9 Даташит, Описание, Даташиты
Block Diagram
HD-6409
BOI
BZI
UDI
RST
SD/CDS
DATA
INPUT
LOGIC
5-BIT SHIFT
REGISTER
AND DECODER
RESET
EDGE
DETECTOR
SD
INPUT/
OUTPUT
SELECT
COMMAND
SYNC
GENERATOR
MANCHESTER
ENCODER
OUTPUT
SELECT
LOGIC
IX
OSCILLATOR
OX
CO
SS
Logic Symbol
COUNTER
CIRCUITS
SS 17
11
CO
CLOCK
GENERATOR
13
12
OX
IX
SD/CDS
ECLK
4
16
MS
RST
SDO
DCLK
NVM
SRST
14
9
5
8
7
6
ENCODER
CONTROL
DECODER
19
18 BOO
BZO
15
CTS
2 BOI
1 BZI
3 UDI
SDO
NVM
BOO
BZO
CTS
SRST
MS
ECLK
DCLK
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HD3-6409-9 Даташит, Описание, Даташиты
HD-6409
Pin Description
PIN
NUMBER TYPE SYMBOL
NAME
DESCRIPTION
1 I BZl Bipolar Zero Input Used in conjunction with pin 2, Bipolar One Input (BOl), to input Manchester II
encoded data to the decoder, BZI and BOl are logical complements. When using
pin 3, Unipolar Data Input (UDI) for data input, BZI must be held high.
2
I
BOl Bipolar One Input
Used in conjunction with pin 1, Bipolar Zero Input (BZI), to input Manchester II
encoded data to the decoder, BOI and BZI are logical complements. When using
pin 3, Unipolar Data Input (UDI) for data input, BOl must be held low.
3 I UDI Unipolar Data Input An alternate to bipolar input (BZl, BOl), Unipolar Data Input (UDl) is used to input
Manchester II encoded data to the decoder. When using pin 1 (BZl) and pin 2
(BOl) for data input, UDI must be held low.
4
I/O SD/CDS Serial Data/Com-
In the converter mode, SD/CDS is an input used to receive serial NRZ data. NRZ
mand Data Sync
data is accepted synchronously on the falling edge of encoder clock output
(ECLK). In the repeater mode, SD/CDS is an output indicating the status of last
valid sync pattern received. A high indicates a command sync and a low indicates
a data sync pattern.
5
O SDO Serial Data Out
The decoded serial NRZ data is transmitted out synchronously with the decoder
clock (DCLK). SDO is forced low when RST is low.
6 O SRST Serial Reset
In the converter mode, SRST follows RST. In the repeater mode, when RST goes
low, SRST goes low and remains low after RST goes high. SRST goes high only
when RST is high, the reset bit is zero, and a valid synchronization sequence is
received.
7 O NVM Nonvalid Manchester A low on NVM indicates that the decoder has received invalid Manchester data
and present data on Serial Data Out (SDO) is invalid. A high indicates that the
sync pulse and data were valid and SDO is valid. NVM is set low by a low on RST,
and remains low after RST goes high until valid sync pulse followed by two valid
Manchester bits is received.
8 O DCLK Decoder Clock The decoder clock is a 1X clock recovered from BZl and BOl, or UDI to synchro-
nously output received NRZ data (SDO).
9 I RST Reset
In the converter mode, a low on RST forces SDO, DCLK, NVM, and SRST low.
A high on RST enables SDO and DCLK, and forces SRST high. NVM remains
low after RST goes high until a valid sync pulse followed by two Manchester bits
is received, after which it goes high. In the repeater mode, RST has the same ef-
fect on SDO, DCLK and NVM as in the converter mode. When RST goes low,
SRST goes low and remains low after RST goes high. SRST goes high only
when RST is high, the reset bit is zero and a valid synchronization sequence is
received.
10 I GND Ground
Ground
11 O CO Clock Output
12 I IX Clock Input
Buffered output of clock input IX. May be used as clock signal for other peripherals.
IX is the input for an external clock or, if the internal oscillator is used, IX and OX
are used for the connection of the crystal.
13 O OX Clock Drive
If the internal oscillator is used, OX and IX are used for the connection of the crys-
tal.
14 I MS Mode Select
MS must be held low for operation in the converter mode, and high for operation
in the repeater mode.
15 I CTS Clear to Send
In the converter mode, a high disables the encoder, forcing outputs BOO, BZO high
and ECLK low. A high to low transition of CTS initiates transmission of a Command
sync pulse. A low on CTS enables BOO, BZO, and ECLK. In the repeater mode,
the function of CTS is identical to that of the converter mode with the exception that
a transition of CTS does not initiate a synchronization sequence.
16 O ECLK Encoder Clock
In the converter mode, ECLK is a 1X clock output used to receive serial NRZ data
to SD/CDS. In the repeater mode, ECLK is a 2X clock which is recovered from
BZl and BOl data by the digital phase locked loop.
5-3










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Номер в каталогеОписаниеПроизводители
HD3-6409-9CMOS Manchester Encoder-DecoderIntersil Corporation
Intersil Corporation

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