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PDF HD49235 Data sheet ( Hoja de datos )
| Número de pieza | HD49235 | |
| Descripción | Digital Signal Processor for CD | |
| Fabricantes | Hitachi Semiconductor | |
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HD49235FS
Digital Signal Processor for CD
ADE-207-162A(Z)
2nd. Edition
August 1995
Description
The HD49235FS is a digital signal processor for compact disc (CD) applications.
Features
• Powerful error correction capability: two-symbol C1 correction and four-symbol C2 correction
• Quadruple-speed reproduction supported (maintaining two-symbol C1 and four-symbol C2 error
correction)
• On-chip analog PLL and digital PLL (VCO and phase detector)
• Automatic adjustment of the free-running frequency of the VCO
• Built-in microprocessor interface
• On-chip 80-bit shift registers for Q-code buffering
• Cyclic redundancy check on Q-code values
• Audio output functions: monaural output, single-channel mute, left-right reverse, soft mute, –12-dB
attenuation
• 16-kbit RAM on-chip
1 page  
HD49235FS
Pin Description (cont)
Pin
No. Symbol Name
I/O*
45 NC
No connection —
46 NC
No connection —
47 NC
No connection —
48 NC
No connection —
49 NC
No connection —
50 NC
No connection —
51 NC
No connection —
52 VDD (D)
53 NC
VDD (digital)
—
No connection —
54 PLLCK PLL clock
O
55 MRST Master reset IU
56 TEST1 TEST 1
IU
57 PDOUT2 Phase detect TO
out 2
58 VSS (A)
59 AC
VSS (analog)
Amp
compensation
—
A
60 AMPO Amp output AO
61 AMPM
62 AMPP
Amp minus
input
AI
Amp plus input AI
63 VDD (A) VDD (analog) —
64 PDOUT1 Phase detect TO
out 1
65 QDSEL Q-data clock IU
select
66 DSLCO DSL control
output
O
67 DSLCI DSL control
input
AI
68 EFMI
EFM signal
input
AI
69 DEFCT Defect
I
70 TEST2 TEST 2
IU
Connection
Open
Open
Open
Open
Open
Open
Open
Open or VDD
Open or VDD
Open or VDD
External RC
circuit
External RC
circuit
External RC
circuit
External RC
circuit
External RC
circuit
External RC
circuit
External RC
circuit
External RC
circuit
Servo IC
Open or VDD
Polarity
Function
HL
Not connected
Not connected
Not connected
Not connected
Not connected
Not connected
Not connected
Digital power supply
Not connected
PLL clock output monitor
Master reset of chip
Reset
Test pin
PLL auto-adjust phase
detector output
Analog ground
Amplifier phase compensation
pin
PLL amplifier output
PLL amplifier inverting input
PLL amplifier non-inverting
input
Analog power supply
PLL EFM phase detector
output
Q data readout mode
switching signal input
EFM comparator slice level
control output
EFM comparator slice level
control input
EFM signal input
Internal External
sync sync
Defect detection signal input Defect
Test pin
Rev.2, Aug. 1995, page 5 of 41
5 Page 
CLV Mode (Register E)
ED3 to ED0/HEX
0000 0
0110 6
Mode
STOP
PLAY
1000
1001
1010
1100
1110
1111
8
9
A
C
E
F
ROT
KICK
BRAKE
ACS
START
NORM
ECU Mode (Register F)
AS0 Mode
0 FULL
1 E4IHD
HD49235FS
Status
Motor stop
Starting mode
Normal mode
Disc motor driven forward
Kick control
Disc motor driven in reverse
Access mode
Forced starting mode
Forced normal mode
Status
Error correction: C1—two symbols; C2—four symbols
C2—four symbol error correction inhibited on track jump
Rev.2, Aug. 1995, page 11 of 41
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HD49235.PDF ] | |
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