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PDF HD66773R Data sheet ( Hoja de datos )

Número de pieza HD66773R
Descripción 262/144-color/ 132 x 176-dot Graphics Controller Driver for TFT LCD panels
Fabricantes ETC 
Logotipo ETC Logotipo



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No Preview Available ! HD66773R Hoja de datos, Descripción, Manual

HD66773R
262,144-color, 132 x 176-dot Graphics Controller Driver
for TFT LCD panels
REJxxxxxxx-xxxxZ
Rev.1.20
Jun.21.2003
Block Diagram .................................................................................................... 6
PAD Arrangement .............................................................................................. 7
PAD Coordinate.................................................................................................. 8
Pin Function ........................................................................................................ 10
Block Function.................................................................................................... 15
1. System Interface ............................................................................................................... 15
2. Bit Operation .................................................................................................................... 15
3. Address Counter (AC) ...................................................................................................... 16
4. Hardware-dither circuit..................................................................................................... 16
5. Graphics RAM (GRAM) .................................................................................................. 16
7. LCD drive power supply................................................................................................... 16
8. Oscillation Circuit (OSC) ................................................................................................. 16
9. LCD Driver Circuit........................................................................................................... 16
GRAM Address MAP......................................................................................... 17
Gram Address and display position on the panel (SS = “0”)....................................................... 17
The relationship between GRAM data and display data (SS =”0”)............................................. 18
Gram Address and display position on the panel (SS = “1”, BGR = “1”)................................... 20
The relationship between GRAM data and display data (SS =”1”)............................................. 21
Instructions ......................................................................................................... 23
Outline......................................................................................................................................... 23
Instructions .................................................................................................................................. 25
Index .......................................................................................................................................... 25
Status Read .................................................................................................................................. 25
Start Oscillation (R00h)............................................................................................................... 25
Driver Output Control (R01h) ..................................................................................................... 26
LCD Driving Waveform Control (R02h) .................................................................................... 28
Power Control 1 (R03h) Power Control 2 (R04h)....................................................................... 29
Power Control 3 (R0Ch) Power Control 4 (R0Dh) Power Control 5 (R0Eh) ............................. 31
Entry Mode (R05h) Compare Register (R06h)............................................................................ 36
Display Control 1 (R07h) ............................................................................................................ 38
Frame Cycle Control (R0Bh) ...................................................................................................... 40
Rev.1.10, Jun.21.2003, page 1 of 133

1 page




HD66773R pdf
HD66773R
Features
Single chip controller/driver for 262,144-color, 132RGB x 176-dot graphics display on TFT LCD
18-/16-/9-/8-bit high-speed bus interfaces and a Serial Peripheral Interface (SPI)
High-speed burst-RAM write function
Window address function enabling data write in a rectangular RAM-address area
Internal bit-operation for graphics
à Bit-unit write-data mask function
à Pixel-unit logical operation / conditional rewrite function
Abundant color-display control function:
à 262,144-color display (max.) with gamma adjustment function
à Line-unit vertical bi-directional scrolling display function
Architecture with low power consumption
à Low-voltage operation: Vcc = 2.2 ~ 3.3 V
à Internal reference voltage power supply: Vci = 2.5 ~ 3.3 V
à Standby mode and other power-save functions:
à Partial LCD drive: 2-screen display at arbitrary two positions
à Internal power supply circuit
à Internal equalizing function
Compliant to Cst/Cadd structures
Internal power supply circuits
à Step-up circuit: 5 ~ 9-time scale, polarity inversion
à Power supply for TFT common electrode: Compliant to Vcom n-raster-row AC drive
à AC drive: Vgoff n-raster-row AC drive with Cadd structure
à Vcom (Vgoff) amplitude adjustment: 22-scale internal electronic volume adjustment
à Output power-supply voltage
à Voltages for power supply for
Vcom amplitude = 6V (max.),
TFT common electrode:
VcomH-GND = VREG1OUT (max.),
VcomL-GND = 1.0V ~ -Vci+0.5V (max.)
Internal RAM capacity: 46,464 bytes
LCD drive circuit with 396-output source signal and 176-output gate signal
n-raster-row inversion drive: polarity inversion by arbitrary number of lines.
Internal oscillation and hardware reset
Changeable source and gate shift directions
Compliant to COG with single chip, incorporating gates arranged on both sides.
Rev.1.10, Jun.21.2003, page 5 of 133

5 Page





HD66773R arduino
HD66773R
Signals
DB1/SDO
Number
of Pins
1
DB2-DB17 16
OSC1, OSC2 2
RESET1*
RESET2*
RESET3*
TEST1
TEST2
Vcc, GND
RVcc
AGND
CGND
3
1
1
2
1
1
1
Vci 1
Vci1 1
DDVDH
1
Vci2
VGH
1
1
I/O Connected Functions
to
I/O MPU
18-bit bi-directional data bus.
8-bit bus interface: DB17-10
9-bit bus interface: DB17-9
16-bit bus interface: DB17-10, 8-1
18-bit bus interface: DB17-0
The pins not used for data transfer must be fixed to Vcc or GND.
Serial data output pin (SDO) to output on the falling edge of SCL
signal in SPI mode.
I/O MPU
18-bit bi-directional data bus.
8-bit bus interface: DB17-10
9-bit bus interface: DB17-9
16-bit bus interface: DB17-10, 8-1
18-bit bus interface: DB17-0
The pins not used for data transfer must be fixed to Vcc or GND.
I/O Oscillation- Connect to an external resistor for R-C oscillation. When
resistor
supplying clocks externally, supply with OSC1, and leave OSC2
open.
I MPU or
Reset pin. Initialize the LSI at low.
Reset
Power-on reset required when turning on the power supply.
generating Supply with either one of RESET1,2,3, and leave the unused pins
circuit
open.
I GND
Test pin. Must be fixed to GND level.
I GND
Test pin. Must be fixed to GND level.
- Power
Logic Vcc: +2.2V ~ +3.3V
supply
Logic-side ground, GND: 0V
- Power
Vcc power supply for internal RAM. Supply same electric potential
supply
as Vcc.
- Power
Analogue-side ground, AGND: 0 V
supply
O Opposing Output GND level.
GND for
Opposing GND for external elements (capacitors, diodes).
external
elements
I Vcc or
Power supply for analogue circuits. Connect to an external power
power
supply of 2.5V ~ 3.3V.
supply
I/O Vcc or
Output internal reference voltage with amplitude between Vci and
power
GND. Reference voltage for step-up circuit1.
supply
Connect to an external power supply of 2.75V or lower, when
internal reference voltage is not used.
I/O Stabilizing Output Vci1 after stepped-up 2~3 times by step-up circuit 1. The
Capacitor or step-up scale is determined with internal register setting. Connect
open
to a stabilizing capacitor. When step-up circuit 1 is not used,
leave open.
I DDVDH or Reference voltage for step-up circuit 2. Connect to DDVDH.
power
Connect to an external power supply of 5.5V or lower, when
supply
DDVDH is not used.
I/O Stabilizing Output voltage with amplitude between VGH and GND after
Capacitor or stepped-up 2~4 times by step-up circuit 2. The step-up scale is
power
determined with internal register setting. Connect to a stabilizing
supply
capacitor. When step-up circuit 2 is not used, connect to an
external power supply of 16.5V or lower.
Rev.1.10, Jun.21.2003, page 11 of 133

11 Page







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