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HD74ACT283 PDF даташит

Спецификация HD74ACT283 изготовлена ​​​​«Hitachi Semiconductor» и имеет функцию, называемую «4-bit Binary Full Adder with Fast Carry».

Детали детали

Номер произв HD74ACT283
Описание 4-bit Binary Full Adder with Fast Carry
Производители Hitachi Semiconductor
логотип Hitachi Semiconductor логотип 

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HD74ACT283 Даташит, Описание, Даташиты
HD74AC283/HD74ACT283
4-bit Binary Full Adder with Fast Carry
Description
The HD74AC283/HD74ACT283 high-speed 4-bit binary full adder with internal carry lookahead accepts
two 4-bit binary works (A0 – A3, B0 – B 3) and a Carry input (C0). It generates the binary Sum outputs (S0
S3) and the Carry output (C4) from the most significant bit. The HD74AC283/HD74ACT283 will operate
with either active High or active Low operands (positive or negative logic).
Features
Outputs Source/Sink 24 mA
HD74ACT283 has TTL-Cmpatible Inputs
Pin Arrangement
S1 1
B1 2
A1 3
S0 4
A0 5
B0 6
C0 7
GND 8
(Top view)
16 VCC
15 B2
14 A2
13 S2
12 A3
11 B3
10 S3
9 C4









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HD74ACT283 Даташит, Описание, Даташиты
HD74AC283/HD74ACT283
Logic Symbol
A0 B0 A1 B1 A2 B2 A3 B3
C0 C4
S0 S1 S2 S3
Pin Names
A0 – A3
B0 – B3
C0
S0 – S3
C4
A Operand Inputs
B Operand Inputs
Carry Input
Sum Outputs
Carry Output
Functional Description
The HD74AC283/HD74ACT283 adds two 4-bit binary words (A plus B) plus the incoming Carry (C0).
The binary sum appears on the Sum (S0 – S3) and outgoing carry (C4) outputs. The binary weight of the
various inputs and outputs is indicated by the subscript numbers, representing powers of two.
20 (A0 + B0 + C0) + 21 (A1 + B1) + 22 (A2 + B2) + 23 (A3 + B3) = S0 + 2S1 + 4S2 + 8S3 + 16C4
Where (+) = plus
Interchanging inputs of equal weight does not affect the operation. Thus C0, A0, B0 can be arbitrarily
assigned to pins 5, 6 and 7 for DIPS. Due to the symmetry of the binary add function, the
HD74AC283/HD74ACT283 can be used either with all inputs and outputs active High (positive logic) or
with all inputs and outputs active Low (negative logic). See Figure a. Note that if C0 is not used it must be
tied Low for active High logic or tied High for active Low logic.
Due to pin limitations, the intermediate carries of the HD74AC283/HD74ACT283 are not brought out for
use as inputs or outputs. However, other means can be used to effectively insert a carry into, or bring a
carry out from, an intermediate stage. Figure b shows how to make a 3-bit adder. Tying the operand inputs
of the fourth adder (A3, B3) Low makes S3 dependent only on, and equal to, the carry from the third adder.
Using somewhat the same principle Figure c shows a way of dividing the HD74AC283/HD74ACT283 into
a 2-bit and a 1-bit adder. The third stage adder (A2, B2, S2) is used merely as a means of getting a carry
(C10) signal into the fourth stage (via A2 and B2) and bringing out the carry from the second stage on S2.
Note that as long as A 2 and B2 are the same, whether High or Low, they do not influence S2. Similarly,
when A2 and B2 are the same the carry into the third stage does not influence the carry out of the third
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HD74ACT283 Даташит, Описание, Даташиты
HD74AC283/HD74ACT283
stage. Figure d shows a method of implementing a 5-input encoder, where the inputs are equally weighted.
The outputs S0, S1 and S2 present a binary number equal to the number of inputs I1 – I5 that are true. Figure
e shows one method of implementing a 5-input majority gate. When three or more of the inputs I1 – I5 are
true, the output M5 is true.
Fig. a Active HIGH varsus Active LOW Interpretation
Logic levels
C0 A0 A1 A2 A3 B0 B1 B2 B3 S0 S1 S2 S3 C4
L L H L HH L L H H H L L H
Active HIGH
0 0 1 0 11 0 0 1 1 1 0 0 1
Active LOW
1 1 0 1 00 1 1 0 0 0 1 1 0
Active HIGH: 0 + 10 + 9 = 3 + 16
Active LOW: 1 + 5 + 6 = 12 + 0
L
A0 B0 A1 B1 A2 B2 A3 B3
C0 C4
S0 S1 S2 S3
Fig. b 3-bit Adder
C3
A0 B0 A1 B1
C10
A10 B10
A0 B0 A1 B1
A2 B2 A3 B3
C0 C0
C4
S0 S1
S2 S3
C11
S0 S1
C2 S10
Fig. c 2-bit and 1-bit adders
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