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PDF HD74ALVCH162501 Data sheet ( Hoja de datos )
| Número de pieza | HD74ALVCH162501 | |
| Descripción | 18-bit Universal Bus Transceivers with 3-state Outputs | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HD74ALVCH162501 (archivo pdf) en la parte inferior de esta página. Total 13 Páginas | ||
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HD74ALVCH162501
18-bit Universal Bus Transceivers with 3-state Outputs
ADE-205-182 (Z)
Preliminary
1st. Edition
December 1996
Description
Data flow in each direction is controlled by output enable (OEAB and OEBA), latch enable (LEAB
and LEBA), and clock (CLKAB and CLKBA) inputs. For A to B data flow, the device operates in the
transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB is held at
a high or low logic level. If LEAB is low, the A bus data is stored in the latch flip flop on the low to
high transition of CLKAB. When OEAB is high, the outputs are active. When OEAB is low, the
outputs are in the high impedance state. Data flow for B to A is similar to that of A to B but uses
OEBA, LEBA, and CLKBA. The output enables are complementary (OEAB is active high, and
OEBA is active low). Active bus hold circuitry is provided to hold unused or floating data inputs at a
valid logic level. All outputs, which are designed to sink up to 12 mA, include 26 Ω resistors to reduce
overshoot and undershoot.
Features
• VCC = 2.3 V to 3.6 V
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.0 V (@VCC = 3.3 V, Ta = 25°C)
• High output current ±12 mA (@VCC = 3.0 V)
• Bus hold on data inputs eliminates the need for external pullup / pulldown resistors
• All outputs have equivalent 26 Ω series resistors, so no external resistors are required.
1 page  
Logic Diagram
OEAB
CLKAB
LEAB
LEBA
CLKBA
OEBA
A1
1
55
2
28
30
27
3
HD74ALVCH162501
1D
C1
CLK
1D
C1
CLK
54
B1
To seventeen other channels
5 Page 
HD74ALVCH162501
• Waveforms – 3
tf
Output
Control
90 %
Vref
10 %
tZL
Waveform - A
Vref
tZH
Waveform - B
Vref
tr
10 %
90 %
Vref
tLZ
tHZ
VOL + 0.3 V
VOH – 0.3 V
VIH
GND
≈VOH1
VOL
VOH
≈VOL1
TEST
VIH
Vref
VOH1
VOL1
Vcc=2.5±0.2V
2.3 V
1.2 V
2.3 V
GND
Vcc=2.7V,
3.3±0.3V
2.7 V
1.5 V
3.0 V
GND
Notes: 1. All input pulses are supplied by generators having the following characteristics:
PRR ≤ 10 MHz, Zo = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
2. Waveform – A is for an output with internal conditions such that the output is low
except when disabled by the output control.
3. Waveform – B is for an output with internal conditions such that the output is high
except when disabled by the output control.
4. The output are measured one at a time with one transition per measurement.
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet HD74ALVCH162501.PDF ] | |
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