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Número de pieza | NTD4813N | |
Descripción | Power MOSFET ( Transistor ) | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! NTD4813N
Power MOSFET
30 V, 40 A, Single N--Channel, DPAK/IPAK
Features
• Low RDS(on) to Minimize Conduction Losses
• Low Capacitance to Minimize Driver Losses
• Optimized Gate Charge to Minimize Switching Losses
• These are Pb--Free Devices
Applications
• CPU Power Delivery
• DC--DC Converters
• High Side Switching
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol Value Unit
Drain--to--Source Voltage
Gate--to--Source Voltage
Continuous Drain
Current RθJA
(Note 1)
VDSS 30 V
VGS ±20 V
TA = 25°C
ID
9.0 A
TA = 85°C
7.0
Power Dissipation
RθJA (Note 1)
Continuous Drain
Current RθJA
(Note 2)
Power Dissipation
RθJA (Note 2)
Continuous Drain
Current RθJC
(Note 1)
TA = 25°C
Steady
State
TA = 25°C
TA = 85°C
TA = 25°C
TC = 25°C
TC = 85°C
PD
ID
PD
ID
1.94 W
7.6 A
5.9
1.27 W
40 A
31
Power Dissipation
RθJC (Note 1)
Pulsed Drain
Current
TC = 25°C
tp=10ms TA = 25°C
PD
IDM
35.3 W
90 A
Current Limited by Package
Operating Junction and Storage
Temperature
Source Current (Body Diode)
Drain to Source dV/dt
TA = 25°C
IDmaxPkg
TJ,
TSTG
IS
dV/dt
35
--55 to
+175
29
6
A
°C
A
V/ns
Single Pulse Drain--to--Source Avalanche
Energy (VDD = 24 V, VGS = 10 V,
IL = 12 Apk, L = 1.0 mH, RG = 25 Ω)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
EAS
72 mJ
TL 260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
© Semiconductor Components Industries, LLC, 2010
June, 2010 -- Rev. 6
1
http://onsemi.com
V(BR)DSS
30 V
RDS(ON) MAX
13 mΩ @ 10 V
24 mΩ @ 4.5 V
D
ID MAX
40 A
G
S
N--CHANNEL MOSFET
4
4
4
12
3
CASE 369AA
DPAK
(Bent Lead)
STYLE 2
1 23
1 23
CASE 369AC CASE 369D
3 IPAK
IPAK
(Straight Lead) (Straight Lead
DPAK)
4
Drain
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
Drain
2
1 Drain 3
Gate Source
1 23
Gate Drain Source
1
23
Gate Drain Source
Y = Year
WW = Work Week
4813N = Device Code
G = Pb--Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
Publication Order Number:
NTD4813N/D
1 page NTD4813N
TYPICAL PERFORMANCE CURVES
1000
900
800
700
600
500
400
300
200
100
0
0
TJ = 25°C
Ciss
Coss
Crss
5 10 15 20
VDS, DRAIN--TO--SOURCE VOLTAGE (VOLTS)
25
Figure 7. Capacitance Variation
100
tr
td(off)
10
td(on)
tf
1
1
VDD = 15 V
ID = 30 A
VGS = 11.5 V
10 100
RG, GATE RESISTANCE (OHMS)
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
1000
100
VGS = 20 V
SINGLE PULSE
TC = 25°C
10 ms
10
1
0.1
100 ms
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
1 ms
10 ms
dc
1 10 100
VDS, DRAIN--TO--SOURCE VOLTAGE (VOLTS)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
15
13.5
12
10.5
QT
9
7.5
6
4.5
3
1.5
0
0
Q1
12
Q2
ID = 30 A
VDD = 15 V
VGS = 11.5 V
TJ = 25°C
3 4 5 6 7 8 9 10 11 12 13 14 15 16
QG, TOTAL GATE CHARGE (nC)
Figure 8. Gate--To--Source and Drain--To--Source
Voltage vs. Total Charge
30
VGS = 0 V
25 TJ = 25°C
20
15
10
5
0
0.5 0.6 0.7 0.8 0.9 1.0
VSD, SOURCE--TO--DRAIN VOLTAGE (VOLTS)
Figure 10. Diode Forward Voltage vs. Current
80
ID = 12 A
70
60
50
40
30
20
10
0
25 50 75 100 125 150 175
TJ, JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet NTD4813N.PDF ] |
Número de pieza | Descripción | Fabricantes |
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