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Número de pieza | HD74HC192 | |
Descripción | Synchronous Up/Down Decade/4-bit Binary Counter(Dual Clock Line) | |
Fabricantes | Hitachi Semiconductor | |
Logotipo | ||
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No Preview Available ! HD74HC192, HD74HC193
Synchronous Up/Down Decade Counter (Dual Clock Lines)
Synchronous Up/Down 4-bit Binary Counter (Dual Clock Lines)
REJ03D0588-0300
Rev.3.00
Jan 31, 2006
Description
The HD74HC192 is a decade counter, and the HD74HC193 is a binary counter. Both counters have two separate clock
inputs, an up count input and a down count input. All outputs of the flip-flops are simultaneously triggered on the low
to high transition of either clock while the other input is held high. The direction of counting is determined by which
input is clocked.
These counters may be preset by entering the desired data on the data A, data B, data C, and data D inputs. When the
load input is taken low the data is loaded independently of either clock input. This feature allows the counters to be
used as divide-by-n counters by modifying the count length with the preset inputs.
In addition both counters can also be cleared. This is accomplished by inputting a high on the clear input. All 4 internal
stages are set to a low level independently of either count input.
Both a borrow and carry output are provided to enable cascading of both up and down counting functions. The borrow
output produces a negative going pulse when the counter underflows and the carry outputs a pulse when the counter
overflows. The counters can be cascaded by connecting the carry and borrow outputs of one device to the count up and
count down inputs, respectively, of the next device.
Features
• High Speed Operation: tpd (Clock Up or Count Down to Q) = 21 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
• Ordering Information
Part Name
Package Type
Package Code
(Previous Code)
Package
Abbreviation
Taping Abbreviation
(Quantity)
HD74HC192P
HD74HC193P
DILP-16 pin
PRDP0016AE-B
(DP-16FV)
P
—
HD74HC192FPEL
SOP-16 pin (JEITA)
HD74HC193FPEL
PRSP0016DH-B
(FP-16DAV)
FP
EL (2,000 pcs/reel)
Note: Please consult the sales office for the above package availability.
Rev.3.00, Jan 31, 2006 page 1 of 13
1 page HD74HC192, HD74HC193
Logic Diagram
HD74HC192
Count
Down
Count
Up
Data A
Data B
HD74HC193
Data C
Data D
Load
Clear
Count
Down
Count
Up
Data A
Data B
Data C
Data D
Load
Clear
Rev.3.00, Jan 31, 2006 page 5 of 13
CK CK
RS
QQ
CK CK
RS
QQ
CK CK
RS
QQ
CK CK
RS
QQ
Borrow
Carry
QA
QB
QC
QD
CK CK
RS
QQ
CK CK
RS
QQ
CK CK
RS
QQ
CK CK
RS
QQ
Borrow
Carry
QA
QB
QC
QD
5 Page HD74HC192, HD74HC193
• Waveform – 4 (HD74HC193)
tr tf
Count
Down
50% 50%
50%
tw (H)
tw (L) tPLH (Measure at tn+0)
50%
tPHL (Measure at tn+1)
QA
50%
50%
tPLH (Measure at tn+0)
tPHL (Measure at tn+2)
QB
50%
50%
tPLH (Measure at tn+0)
tPHL (Measure at tn+4)
QC
50%
50%
tPLH (Measure at tn+0)
tPHL (Measure at tn+8)
QD
50%
50%
Borrow
(Measure before tPHL
1 clock of tn+0)
tPLH (Measure at tn+0)
90%
50%
10%
90%
50%
tTHL
tTLH
Notes : 1. Input pulse : PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns
2. tn is reference bit time when outputs are H, L, L, H
VCC
0V
VOH
VOL
VOH
VOL
VOH
VOL
VOH
VOL
VOH
VOL
Rev.3.00, Jan 31, 2006 page 11 of 13
11 Page |
Páginas | Total 14 Páginas | |
PDF Descargar | [ Datasheet HD74HC192.PDF ] |
Número de pieza | Descripción | Fabricantes |
HD74HC190 | Synchronous Up/Down Decade/4-bit Binary Counter(Single Clock Line) | Hitachi Semiconductor |
HD74HC191 | Synchronous Up/Down Decade/4-bit Binary Counter(Single Clock Line) | Hitachi Semiconductor |
HD74HC192 | Synchronous Up/Down Decade/4-bit Binary Counter(Dual Clock Line) | Hitachi Semiconductor |
HD74HC193 | Synchronous Up/Down Decade/4-bit Binary Counter(Dual Clock Line) | Hitachi Semiconductor |
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