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PDF HD74HC273 Data sheet ( Hoja de datos )
| Número de pieza | HD74HC273 | |
| Descripción | Octal D-type Flip-Flops (with Clear) | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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HD74HC273
Octal D-type Flip-Flops (with Clear)
Description
This device contains 8 master-slave flip-flops with a common clock and common clear. Data on the D
input having the specified setup and hold times is transferred to the Q output on the low to high transition
of the clock input. The clear input when low, sets all outputs to a low state.
Features
• High Speed Operation: tpd (Clock to Q) = 18 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Inputs
Clear
L
H
H
H
H
Clock
X
L
D
X
H
L
X
X
Outputs
Q
L
H
L
No change
No change
1 page  
HD74HC273
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25°C
Ta = –40 to
+85°C
Item
Maximum clock
frequency
Symbol
f max
VCC (V)
2.0
4.5
Min Typ Max Min
——6 —
— — 30 —
Max Unit Test Conditions
5 MHz
24
6.0 — — 35 — 28
Propagation delay tPHL
time
2.0 — — 145 — 180 ns Clock to Q
4.5 — 18 29 — 36
6.0 — — 25 — 31
tPLH 2.0 — — 145 — 180 ns
4.5 — 18 29 — 36
6.0 — — 25 — 31
tPHL 2.0 — — 145 — 180 ns Clear to Q
4.5 — 15 29 — 36
6.0 — — 25 — 31
Setup time
tsu 2.0 100 — — 125 — ns Data to clock
4.5 20 2 — 25 —
6.0 17 — — 21 —
Hold time
th 2.0 5 — — 5 — ns Clock to data
4.5 5 0 — 5 —
6.0 5 — — 5 —
Removal time
t rem
2.0 100 — — 125 — ns Clear to clock
4.5 20 –1 — 25 —
6.0 17 — — 21 —
Pulse width tw 2.0 80 — — 100 — ns Clock, clear
4.5 16 8 — 20 —
6.0 14 — — 17 —
Output rise/fall
time
t TLH
t THL
2.0 — — 75 — 95 ns
4.5 — 5 15 — 19
6.0 — — 13 — 16
Input capacitance Cin — — 5 10 — 10 pF
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet HD74HC273.PDF ] | |
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