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Número de pieza | HD74HC4020 | |
Descripción | 14-stage Binary Counter | |
Fabricantes | Hitachi Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de HD74HC4020 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
No Preview Available ! HD74HC4020
14-stage Binary Counter
Description
The HD74HC4020 is a 14 stage counter. This device is incremented on the falling edge (negative
transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset
input.
Features
• High Speed Operation: tpd (Clock to Q1) = 14 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Clock
X
Reset
L
L
H
Outputs State
No change
Advance to next state
All output are low
1 page HD74HC4020
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25°C
Ta = –40 to
+85°C
Item
Maximum clock
frequency
Symbol
f max
VCC (V)
2.0
4.5
Min Typ Max Min
——5 —
— — 25 —
Max Unit Test Conditions
4 MHz
20
6.0 — — 29 — 24
Propagation delay tPLH
time
t PHL
2.0 — — 175 — 220 ns Clock to Q1
4.5 — 14 35 — 44
6.0 — — 30 — 37
tPLH 2.0 — — 175 — 220 ns Clock to Q1
tPHL 4.5 — 14 35 — 44
6.0 — — 30 — 37
tPLH 2.0 — — 200 — 250 ns Reset to output
tPHL 4.5 — 18 40 — 50
6.0 — — 34 — 43
tPLH 2.0 — — 100 — 125 ns Qn to Qn – 1
tPHL 4.5 — — 20 — 25
6.0 — — 17 — 21
Removal time
t rem
2.0 100 — — 125 — ns
4.5 20 6 — 25 —
6.0 17 — — 21 —
Pulse width tw 2.0 80 — — 100 — ns
4.5 16 4 — 20 —
6.0 14 — — 17 —
Output rise/fall
time
t TLH
t THL
2.0 — — 75 — 95 ns
4.5 — 5 15 — 19
6.0 — — 13 — 16
Input capacitance Cin — — 5 10 — 10 pF
5
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet HD74HC4020.PDF ] |
Número de pieza | Descripción | Fabricantes |
HD74HC4020 | 14-stage Binary Counter | Hitachi Semiconductor |
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