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PDF HD74HC4060 Data sheet ( Hoja de datos )
| Número de pieza | HD74HC4060 | |
| Descripción | 14-stage Binary Counter | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
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HD74HC4060
14-stage Binary Counter
Description
The HD74HC4060 is a 14 stage counter, this device increments on the falling edge (negative transition) of
the input clock, and all their outputs are reset to a low level by applying a logical high on their reset input.
The HD74HC4060 also has two additional inputs to enable easy connection of either an RC or crystal
oscillator.
Features
• High Speed Operation: tpd (Clock to Q4) = 41.5 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Clock in
X
X : Irrelevant
Reset
L
L
H
Outputs State
No change
Advance to next state
All outputs are low
1 page  
HD74HC4060
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25°C
Ta = –40 to
+85°C
Item
Maximum clock
frequency
Symbol
f max
VCC (V)
2.0
4.5
Min Typ Max Min
——4 —
— — 20 —
Max Unit Test Conditions
3 MHz
16
6.0 — — 24 — 19
Propagation delay tPLH
time
2.0 — — 300 — 375 ns Clock to Q4
4.5 — 42 60 — 75
6.0 — — 51 — 63
tPHL 2.0 — — 300 — 375 ns Clock to Q4
4.5 — 41 60 — 75
6.0 — — 51 — 63
tPHL 2.0 — — 240 — 300 ns Reset to output
4.5 — 16 48 — 60
6.0 — — 41 — 51
Removal time
t rem
2.0 100 — — 125 — ns
4.5 20 10 — 25 —
6.0 17 — — 21 —
Pulse width tw 2.0 80 — — 100 — ns
4.5 16 7 — 20 —
6.0 14 — — 17 —
Output rise/fall
time
t TLH
t THL
2.0 — — 75 — 95 ns
4.5 — 5 15 — 19
6.0 — — 13 — 16
Input capacitance Cin — — 5 10 — 10 pF
5
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HD74HC4060.PDF ] | |
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