(PDF) HD74HCT126 Datasheet - Quad. Bus Buffer Gates (with 3-state outputs)

Número de pieza	HD74HCT126
Descripción	Quad. Bus Buffer Gates (with 3-state outputs)
Fabricantes	Hitachi Semiconductor
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No Preview Available ! HD74HCT125/HD74HCT126 Quad. Bus Buffer Gates (with 3-state outputs) Description The HD74HCT125, HD74HCT126 require the 3-state control input C to be taken high to put the output into the high impedance condition, whereas the HD74HCT125, HD74HCT126 requires the control input to be low to put the output into high impedance. Features • LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility • High Speed Operation: tpd (A to Y) = 12 ns typ (CL = 50 pF) • High Output Current: Fanout of 15 LSTTL Loads • Wide Operating Voltage: VCC = 4.5 to 5.5 V • Low Input Current: 1 µA max • Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Input C HCT125 HCT126 A HL X LH L LH H Notes: X: Irrelevant Z: Off (High-impedance) state of a 3-state output. Output Y HD74HCT125 Z L H HD74HCT126 Z L H 1 page 19.20 20.32 Max 14 8 1 1.30 7 2.39 Max Unit: mm 7.62 2.54 ± 0.25 0.48 ± 0.10 0.25 + – 0.10 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) DP-14 Conforms Conforms 0.97 g 5 Page

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PDF HD74HCT126 Data sheet ( Hoja de datos )