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PDF HD74HCT533 Data sheet ( Hoja de datos )

Número de pieza HD74HCT533
Descripción Octal D-type Transparent Latches(with inverted 3-state outputs)
Fabricantes Hitachi Semiconductor 
Logotipo Hitachi Semiconductor Logotipo



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HD74HCT373/HD74HCT533
Octal D-type Transparent Latches (with 3-state outputs)/
Octal D-type Transparent Latches (with inverted 3-state outputs)
Description
When the latch enable input is high, the Q outputs of HD74HCT373 will follow the D inputs and the Q
outputs of HD74HCT533 will follow the inversion of the D inputs. When the latch enable goes low, data at
the D inputs will be retained at the outputs until latch enable returns high again. When a high logic level is
applied to the output control input, all outputs go to a high impedance state, regardless of what signals
present at the other inputs and the state of the storage elements.
Features
LSTTL Output Logic Level Compatibility as well as CMOS Output Compatibility
High Speed Operation: tpd (Data to Q) = 14 ns typ (CL = 50 pF)
High Output Current: Fanout of 15 LSTTL Loads
Wide Operating Voltage: VCC = 4.5 to 5.5 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)
Function Table
Output Control
Enable
G
D
LH
H
LH
L
LL
X
HX
X
X : Irrelevant
Z : Off (high-impedance) state of a 3-state output.
HD74HCT373
Q
H
L
No change
Z
HD74HCT533
Q
L
H
No change
Z

1 page




HD74HCT533 pdf
HD74HCT373/HD74HCT533
AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Item
Symbol
Propagation delay tPLH
time
t PHL
t PLH
t PHL
Output enable
t ZL
time
t ZH
Output disable
t LZ
time
t HZ
Setup time
t su
Hold time
th
Pulse width
tw
Output rise/fall
time
t TLH
t THL
Input capacitance Cin
Ta = 25°C
Ta = –40 to
+85°C
Min Typ Max Min Max
— 13 30 — 38
— 16 30 — 38
— 14 25 — 31
— 12 25 — 31
— 16 30 — 38
— 15 30 — 38
— 14 30 — 38
— 16 30 — 38
20 — — 25 —
10 — — 13 —
16 — — 20 —
— 4 12 — 15
— 5 10 — 10
Unit
ns
ns
ns
ns
ns
ns
ns
ns
pF
Test Conditions
VCC (V)
4.5 Latch control to Q
4.5
4.5 Data to Q
4.5
4.5
4.5
4.5
4.5
4.5 Data to latch control
4.5 Latch control to data
4.5 Latch control, output control
4.5
5

5 Page










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