|
|
PDF HD74LV165A Data sheet ( Hoja de datos )
| Número de pieza | HD74LV165A | |
| Descripción | Parallel-Load 8-bit Shift Register | |
| Fabricantes | Hitachi Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de HD74LV165A (archivo pdf) en la parte inferior de esta página. Total 17 Páginas | ||
|
No Preview Available !
HD74LV165A
Parallel-Load 8-bit Shift Register
ADE-205-267 (Z)
1st Edition
March 1999
Description
The HD74LV165A is 8-bit serial shift register shifts data from QA to QH when clocked. Parallel inputs to
each stage are enabled by a low level at the Shift/Load input. Also included is a gated clock input and a
complementary output from the eighth bit.
Clocking is accomplished through a 2-input NOR gate permitting one input to be used as a clock inhibit
function. Holding either of the clock inputs high inhibits clocking, and high enables the other clock input.
Data transfer occurs on the positive going edge of the clock. Parallel loading is inhibited as long as the
Shift/Load input is high. When taken low, data at the parallel inputs is loaded directly into the register
independent of the state of the clock.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook
computers), and the low-power consumption extends the battery life.
Features
• VCC = 2.0 V to 5.5 V operation
• All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
• All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
• Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
• Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
• Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
1 page  
HD74LV165A
Logic Diagram
SH/LD 1
CLK INH 15
CLK 2
SER 10
ABCD E FGH
11 12 13 14
3
4
5
6
S
C1
1D
R
S
C1
1D
R
S
C1
1D
R
S
C1
1D
R
S
C1
1D
R
S
C1
1D
R
S
C1
1D
R
S
C1
1D
9
7
R
QH
QH
Timing Diagram
CLK
CLK INH
SER
SH/LD
A
B
C
Data
Inputs
D
E
F
G
H
L
H
L
H
L
H
L
H
H
QH
QH
Inhibit
Load
H H LH LH LH
L LH LHLHL
Serial Shift
5
5 Page 
Waveform
Waveform – 1
Sereial mode
SER
CK or
CK INH
50% VCC
tsu
th
50% VCC
tw(L)
QH, QH
Waveform – 2
Parallel mode
50% VCC
tPLH, tPHL
SH/LD
QH, QH
50% VCC
tw(L)
50% VCC
tPLH
HD74LV165A
50% VCC
tsu
VCC
GND
th
VCC
50% VCC
tw(H)
GND
VOH
50% VCC
VOL
tPLH, tPHL
tPHL
VCC
GND
VOH
VOL
11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet HD74LV165A.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| HD74LV165A | Parallel-Load 8-bit Shift Register | Hitachi Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |