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HD74LV175A PDF даташит

Спецификация HD74LV175A изготовлена ​​​​«Hitachi Semiconductor» и имеет функцию, называемую «Quad. D-type Flip-Flops with Clear».

Детали детали

Номер произв HD74LV175A
Описание Quad. D-type Flip-Flops with Clear
Производители Hitachi Semiconductor
логотип Hitachi Semiconductor логотип 

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HD74LV175A Даташит, Описание, Даташиты
HD74LV175A
Quad. D-type Flip-Flops with Clear
ADE-205-270 (Z)
1st Edition
April 1999
Description
Information at the D inputs of the HD74LV175A is transferred to the Q and Q outputs on the positive going
edge of the clock pulse. Both true and complement outputs from each flip-flop are externally available.
All four flip-flops are controlled by a common clock and common clear. Clearing is accomplished by a
negative pulse at the clear input. All four Q outputs are cleared to a logic low level and all four Q outputs
to a logic high level. Low-voltage and high-speed operation is suitable for battery-powered products (e.g.,
notebook computers), and the low-power consumption extends the battery life.
Features
VCC = 2.0 V to 5.5 V operation
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
Function Table
Inputs
CLR
CLK
LX
H
H
H
Note:
H: High level
L: Low level
X: Immaterial
: Low to high transition
: High to low transition
D
X
H
L
X
Outputs
Q
L
H
L
no change
Q
H
L
H
no change









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HD74LV175A Даташит, Описание, Даташиты
HD74LV175A
Pin Arrangement
CLR 1
1Q 2
1Q 3
1D 4
2D 5
2Q 6
2Q 7
GND 8
16 VCC
15 4Q
14 4Q
13 4D
12 3D
11 3Q
10 3Q
9 CLK
(Top view)
2









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HD74LV175A Даташит, Описание, Даташиты
HD74LV175A
Absolute Maximum Ratings
Item
Symbol
Ratings
Unit Conditions
Supply voltage range
Input voltage range*1
Output voltage range*1, 2
VCC
VI
VO
Input clamp current
Output clamp current
Continuous output current
Continuous current through
VCC or GND
Maximum power dissipation
at Ta = 25°C (in still air)*3
I IK
I OK
IO
ICC or IGND
PT
–0.5 to 7.0
–0.5 to 7.0
–0.5 to VCC + 0.5
–0.5 to 7.0
–20
±50
±25
±50
V
V
V
mA
mA
mA
mA
785 mW
Output: H or L
VCC: OFF
VI < 0
VO < 0 or VO > VCC
VO = 0 to VCC
SOP
500 TSSOP
Storage temperature
Tstg
–65 to 150
°C
Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore,
no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
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Номер в каталогеОписаниеПроизводители
HD74LV175AQuad. D-type Flip-Flops with ClearHitachi Semiconductor
Hitachi Semiconductor

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