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PDF HD74LV4040A Data sheet ( Hoja de datos )

Número de pieza HD74LV4040A
Descripción 12-stage Binary Counter
Fabricantes Hitachi Semiconductor 
Logotipo Hitachi Semiconductor Logotipo



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No Preview Available ! HD74LV4040A Hoja de datos, Descripción, Manual

HD74LV4040A
12-stage Binary Counter
ADE-205-282 (Z)
1st Edition
April 1999
Description
The HD74LV4040A is a 12 stage counter. This device is incremented on the falling edge (negative
transition) of the input clock, and all its output is reset to a low level by applying a logical high on its reset
input. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook
computers), and the low-power consumption extends the battery life.
Features
VCC = 2.0 V to 5.5 V operation
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
Function Table
Inputs
CLK
X
Note:
H:
L:
X:
:
:
CLR
L
L
H
High level
Low level
Immaterial
Low to high transition
High to low transition
Output
Qn
Remains unchanged
Changed
All outputs low

1 page




HD74LV4040A pdf
Logic Diagram
(11)
CLR
CLK (10)
HD74LV4040A
R (9) R (4)
Q1 Q7
TT
R (7) R (13)
Q2 Q8
TT
R (6) R (12)
Q3 Q9
TT
R (5) R (14)
Q 4 Q 10
TT
R (3) R (15)
Q 5 Q 11
TT
R (2) R (1)
Q 6 Q 12
TT
5

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HD74LV4040A arduino
Operating Characteristics
CL = 50 pF
Item
Power
dissipation
capacitance
Symbol
CPD
VCC = (V)
3.3
5.0
Ta = 25°C
Min Typ
— 17.3
— 19.0
Max
HD74LV4040A
Unit Test Conditions
pF f = 10 MHz
Noise Characteristics
CL = 50 pF
Item
Quiet output,
maximum
dynamic VOL
Quiet output,
minimum
dynamic VOL
Quiet output,
minimum
dynamic VOH
High-level
dynamic
input voltage
Low-level
dynamic
input voltage
Symbol
VOL (P)
VOL (V)
VOH (V)
VIH (D)
VIL (D)
VCC = (V)
3.3
3.3
3.3
3.3
3.3
Ta = 25°C
Min Typ
— 0.4
— –0.5
— 3.0
2.31 —
——
Max
0.8
-0.8
0.99
Unit Test Conditions
V
11

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